From patchwork Mon Oct 18 03:50:39 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 260921 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o9I3nxKT021018 for ; Mon, 18 Oct 2010 03:50:41 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751274Ab0JRDul (ORCPT ); Sun, 17 Oct 2010 23:50:41 -0400 Received: from mail.renesas.com ([202.234.163.13]:46777 "EHLO mail03.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751002Ab0JRDuk (ORCPT ); Sun, 17 Oct 2010 23:50:40 -0400 X-AuditID: ac140386-0000000500003037-e9-4cbbc40e4d64 Received: from guardian03.idc.renesas.com ([172.20.8.202]) by mail03.idc.renesas.com (sendmail) with ESMTP id o9I3ocof025379; Mon, 18 Oct 2010 12:50:38 +0900 (JST) Received: (from root@localhost) by guardian03.idc.renesas.com with id o9I3odvQ026239; Mon, 18 Oct 2010 12:50:39 +0900 (JST) Received: from mta08.idc.renesas.com (localhost [127.0.0.1]) by mta08.idc.renesas.com with ESMTP id o9I3od5G012760; Mon, 18 Oct 2010 12:50:39 +0900 (JST) Received: from PG10870.renesas.com ([172.30.8.159]) by ims05.idc.renesas.com (Sendmail) with ESMTPA id <0LAG00C1LW0EFO@ims05.idc.renesas.com>; Mon, 18 Oct 2010 12:50:39 +0900 (JST) Date: Mon, 18 Oct 2010 12:50:39 +0900 (JST) Date-warning: Date header was inserted by ims05.idc.renesas.com From: Kuninori Morimoto Subject: [PATCH 2/2] ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock support In-reply-to: To: Paul Mundt Cc: Linux-SH Message-id: MIME-version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-type: text/plain; charset=US-ASCII User-Agent: SEMI/1.14.6 (Maruoka) FLIM/1.14.7 (=?ISO-2022-JP-2?B?U2Fuag==?= =?ISO-2022-JP-2?B?GyQoRCtXGyhC?=) APEL/10.6 Emacs/23.2 (i386-mingw-nt5.1.2600) MULE/6.0 (HANACHIRUSATO) References: <20101015061630.GA7489@linux-sh.org> <20101015093922.GC7489@linux-sh.org> <20101015155042.GA14975@linux-sh.org> X-Brightmail-Tracker: AAAAAA== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Mon, 18 Oct 2010 03:50:41 +0000 (UTC) diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c index 8565aef..fe7fa15 100644 --- a/arch/arm/mach-shmobile/clock-sh7372.c +++ b/arch/arm/mach-shmobile/clock-sh7372.c @@ -50,6 +50,9 @@ #define SMSTPCR3 0xe615013c #define SMSTPCR4 0xe6150140 +#define FSIDIVA 0xFE1F8000 +#define FSIDIVB 0xFE1F8008 + /* Platforms must set frequency on their DV_CLKI pin */ struct clk sh7372_dv_clki_clk = { }; @@ -417,6 +420,101 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2), }; +/* FSI DIV */ +static unsigned long fsidiv_recalc(struct clk *clk) +{ + unsigned long value; + + value = __raw_readl(clk->mapping->base); + + if ((value & 0x3) != 0x3) + return 0; + + value >>= 16; + if (value < 2) + return 0; + + return clk->parent->rate / value; +} + +static long fsidiv_round_rate(struct clk *clk, unsigned long rate) +{ + return clk_rate_div_range_round(clk, 2, 0xffff, rate); +} + +static void fsidiv_disable(struct clk *clk) +{ + __raw_writel(0, clk->mapping->base); +} + +static int fsidiv_enable(struct clk *clk) +{ + unsigned long value; + + value = __raw_readl(clk->mapping->base) >> 16; + if (value < 2) { + fsidiv_disable(clk); + return -ENOENT; + } + + __raw_writel((value << 16) | 0x3, clk->mapping->base); + + return 0; +} + +static int fsidiv_set_rate(struct clk *clk, + unsigned long rate, int algo_id) +{ + int idx; + + if (clk->parent->rate == rate) { + fsidiv_disable(clk); + return 0; + } + + idx = (clk->parent->rate / rate) & 0xffff; + if (idx < 2) + return -ENOENT; + + __raw_writel(idx << 16, clk->mapping->base); + return fsidiv_enable(clk); +} + +static struct clk_ops fsidiv_clk_ops = { + .recalc = fsidiv_recalc, + .round_rate = fsidiv_round_rate, + .set_rate = fsidiv_set_rate, + .enable = fsidiv_enable, + .disable = fsidiv_disable, +}; + +static struct clk_mapping sh7372_fsidiva_clk_mapping = { + .phys = FSIDIVA, + .len = 8, +}; + +struct clk sh7372_fsidiva_clk = { + .ops = &fsidiv_clk_ops, + .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */ + .mapping = &sh7372_fsidiva_clk_mapping, +}; + +static struct clk_mapping sh7372_fsidivb_clk_mapping = { + .phys = FSIDIVB, + .len = 8, +}; + +struct clk sh7372_fsidivb_clk = { + .ops = &fsidiv_clk_ops, + .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */ + .mapping = &sh7372_fsidivb_clk_mapping, +}; + +static struct clk *late_main_clks[] = { + &sh7372_fsidiva_clk, + &sh7372_fsidivb_clk, +}; + enum { MSTP001, MSTP131, MSTP130, MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, @@ -585,6 +683,9 @@ void __init sh7372_clock_init(void) if (!ret) ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); + for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) + ret = clk_register(late_main_clks[k]); + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); if (!ret) diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h index 147775a..e4f9004 100644 --- a/arch/arm/mach-shmobile/include/mach/sh7372.h +++ b/arch/arm/mach-shmobile/include/mach/sh7372.h @@ -464,5 +464,7 @@ extern struct clk sh7372_dv_clki_div2_clk; extern struct clk sh7372_pllc2_clk; extern struct clk sh7372_fsiack_clk; extern struct clk sh7372_fsibck_clk; +extern struct clk sh7372_fsidiva_clk; +extern struct clk sh7372_fsidivb_clk; #endif /* __ASM_SH7372_H__ */