From patchwork Thu Feb 27 18:21:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 11409395 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 47FF513A4 for ; Thu, 27 Feb 2020 18:22:22 +0000 (UTC) Received: from web01.groups.io (unknown [66.175.222.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1EAFD246B4 for ; Thu, 27 Feb 2020 18:22:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=linux.kernel.org header.i=@linux.kernel.org header.b="JzC2/dsH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1EAFD246B4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=bounce+26986+1473+1554929+3438807@linux.kernel.org X-Received: by 127.0.0.2 with SMTP id 0zmrYY1556264xUl9FPzhDSo; Thu, 27 Feb 2020 10:22:21 -0800 X-Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mx.groups.io with SMTP id smtpd.web12.138.1582827741315697021 for ; Thu, 27 Feb 2020 10:22:21 -0800 X-Received: by mail.kernel.org (Postfix) id 19143246AC; Thu, 27 Feb 2020 18:22:21 +0000 (UTC) X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mail.kernel.org (Postfix) with ESMTP id A64E32469C; Thu, 27 Feb 2020 18:22:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A64E32469C X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 251281FB; Thu, 27 Feb 2020 10:22:20 -0800 (PST) X-Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.197.25]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 78DFD3F73B; Thu, 27 Feb 2020 10:22:18 -0800 (PST) From: Andre Przywara To: Linuxkernel+Patchwork-Soc via Email Integration Cc: Maxime Ripard , Robert Richter , soc@kernel.org, Jon Loeliger , Mark Langsdorf , Eric Auger , Will Deacon , Catalin Marinas Subject: [PATCH v2 00/13] arm: calxeda: update DTS, bindings and MAINTAINERS Date: Thu, 27 Feb 2020 18:21:57 +0000 Message-Id: <20200227182210.89512-1-andre.przywara@arm.com> Precedence: Bulk List-Unsubscribe: Sender: patchwork-soc@linux.kernel.org List-Id: Mailing-List: list patchwork-soc@linux.kernel.org; contact patchwork-soc+owner@linux.kernel.org Delivered-To: mailing list patchwork-soc@linux.kernel.org Reply-To: patchwork-soc+owner@linux.kernel.org X-Gm-Message-State: aZhyBlaxw2D1irjfvs6IMo8ix1554929AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux.kernel.org; q=dns/txt; s=20140610; t=1582827741; bh=pkgaGFp5RjP3+s+gaPaqA17MXSuFRs1hQUUq+uFrrRQ=; h=Cc:Date:From:Reply-To:Subject:To; b=JzC2/dsH5x6nWkcN1pk+qbGnqbBWkoqQNbdopTY1M4Y16iOWxguwE7FWac01Sf1qeJE 6BEZdv0pUQ3k5v8ZUjCpIZCSj1ReIAPLrGCxCD1qNR371hsQrXh6kib9k7hG7TD+csuS/ mejPNeNnNEO4sZRU0VtYQ/5tfhB2dQLc32I= Hi, some smaller changes, as pointed out by Maxime. Many thanks! ------------------ This series is an answer to the attempt [1] of removing the Calxeda Highbank platform support from the kernel. Apart from the pending removal of ARM32 host KVM support from the kernel, the lack of proper DT schema bindings was another major reason for Rob's series. This series addresses this. The first four patches adjust the .dts files to pass the existing (mostly generic) DT schema binding checks. Those changes should not affect the functionality. The following eight patches then convert the "prose" DT binding documentation to the json-schema format, so that the automatic checking actually does something useful. After those patches "make dtbs_check" comes back clean for the two .dts files in the kernel, and "dt_validate -m" reports only those three not-covered nodes (on Highbank, only the last one on Midway): arm,cortex-a9-twd-timer arm,cortex-a9-twd-wdt calxeda,hb-sdhci The first two are generic ARM devices, for which the binding doc just does not have been converted yet. The SDHCI controller is actually disabled in the DTs, and the SD slot is populated on very few special systems only, also there has never been a driver in the kernel for this device anyway. The final patch then changes the MAINTAINERS file to hand over the maintainership to me. I have a working machine under my desk and have some interest in keeping this platform support alive. Changelog: v1 ... v2: - Remove unneeded property type from clocks and sgpio-gpio - add additionalProperties: false to bindings missing it before - limit number in "phydev" to the hardware constraint of 5 bits - add required: properties to l2ecc binding - fix enumeration of compatible strings in calxeda-ddr-ctrlr Cheers, Andre. [1] https://lore.kernel.org/linux-arm-kernel/20200218171321.30990-1-robh@kernel.org/ Andre Przywara (13): arm: dts: calxeda: Basic DT file fixes arm: dts: calxeda: Provide UART clock arm: dts: calxeda: Fix interrupt grouping arm: dts: calxeda: Group port-phys and sgpio-gpio items dt-bindings: clock: Convert Calxeda clock bindings to json-schema dt-bindings: sata: Convert Calxeda SATA controller to json-schema dt-bindings: net: Convert Calxeda Ethernet binding to json-schema dt-bindings: phy: Convert Calxeda ComboPHY binding to json-schema dt-bindings: arm: Convert Calxeda L2 cache controller to json-schema dt-bindings: memory-controllers: convert Calxeda DDR to json-schema dt-bindings: ipmi: Convert IPMI-SMIC bindings to json-schema dt-bindings: arm: Add Calxeda system registers json-schema binding MAINTAINERS: Update Calxeda Highbank maintainership .../bindings/arm/calxeda/hb-sregs.yaml | 47 +++++++++ .../devicetree/bindings/arm/calxeda/l2ecc.txt | 15 --- .../bindings/arm/calxeda/l2ecc.yaml | 36 +++++++ .../devicetree/bindings/ata/sata_highbank.txt | 44 --------- .../bindings/ata/sata_highbank.yaml | 96 +++++++++++++++++++ .../devicetree/bindings/clock/calxeda.txt | 17 ---- .../devicetree/bindings/clock/calxeda.yaml | 83 ++++++++++++++++ .../devicetree/bindings/ipmi/ipmi-smic.txt | 25 ----- .../devicetree/bindings/ipmi/ipmi-smic.yaml | 56 +++++++++++ .../memory-controllers/calxeda-ddr-ctrlr.txt | 16 ---- .../memory-controllers/calxeda-ddr-ctrlr.yaml | 41 ++++++++ .../devicetree/bindings/net/calxeda-xgmac.txt | 18 ---- .../bindings/net/calxeda-xgmac.yaml | 47 +++++++++ .../bindings/phy/calxeda-combophy.txt | 17 ---- .../bindings/phy/calxeda-combophy.yaml | 47 +++++++++ MAINTAINERS | 2 +- arch/arm/boot/dts/ecx-2000.dts | 5 +- arch/arm/boot/dts/ecx-common.dtsi | 17 ++-- arch/arm/boot/dts/highbank.dts | 11 +-- 19 files changed, 468 insertions(+), 172 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/calxeda/hb-sregs.yaml delete mode 100644 Documentation/devicetree/bindings/arm/calxeda/l2ecc.txt create mode 100644 Documentation/devicetree/bindings/arm/calxeda/l2ecc.yaml delete mode 100644 Documentation/devicetree/bindings/ata/sata_highbank.txt create mode 100644 Documentation/devicetree/bindings/ata/sata_highbank.yaml delete mode 100644 Documentation/devicetree/bindings/clock/calxeda.txt create mode 100644 Documentation/devicetree/bindings/clock/calxeda.yaml delete mode 100644 Documentation/devicetree/bindings/ipmi/ipmi-smic.txt create mode 100644 Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml delete mode 100644 Documentation/devicetree/bindings/net/calxeda-xgmac.txt create mode 100644 Documentation/devicetree/bindings/net/calxeda-xgmac.yaml delete mode 100644 Documentation/devicetree/bindings/phy/calxeda-combophy.txt create mode 100644 Documentation/devicetree/bindings/phy/calxeda-combophy.yaml