From patchwork Wed May 13 12:55:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lars Povlsen X-Patchwork-Id: 11545997 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ECD1690 for ; Wed, 13 May 2020 12:56:56 +0000 (UTC) Received: by mail.kernel.org (Postfix) id E68CC24930; Wed, 13 May 2020 12:56:56 +0000 (UTC) Delivered-To: soc@kernel.org Received: from esa3.microchip.iphmx.com (esa3.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BC93924935; Wed, 13 May 2020 12:56:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="jWMv1SiE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BC93924935 Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=microchip.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=Lars.Povlsen@microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1589374616; x=1620910616; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tnLWmU9TG0hHNpiEsQJmeBvXg8PJsOm3nln/lwMbNII=; b=jWMv1SiElsKoLpJiDb0vND4QaEsOf5JjkWYiqsVDmZKGLDy2JO1FK26+ WGvGBEjtWZFCa+xYTmaYP+VM40rFBwKqReHNIdfXVsZnxj2wHYGdajaVR zw4O+KXZBEfqf56D5objzPvlg6Zk7Nqa7lnoPFTDO7movSsp9Y413eLpm Aa9SHTnzzcK+u7Nbk0xM0KdqeMmvdXTEJfj0ilkkfjZAaeNDX3Ia1G+jr BhoS/LZZuliSeUKsmZRaAy1kmZG4RDEHmErJd8qFzuejKWDdBP6Eruz2K S87VNLQ77kPjMj1hoAY68rdS2QMo0YkF3dtY/eOFZO3plDMZGmrT/z51V w==; IronPort-SDR: iPcmnwfvFRdYKmx9fcBuWP/43p5J+o/Hc4a9KPJnQ45OI62gYQOywxkAutC2Lxc7aN6VKmbdQL C2romUuZo8OLj5ePxprebSXup3EIm2IxT467FjHmpBibuXw4O5t/lLOAMF2oijchUKNYVdYxgx de2mmO/IDSBNmxot12YgHkFtgxLmatdkOmeSHLg6u6cP1ktNiIZ0gYtSGEur/x6MBjKuhNBNxX 7hbb9JM2e1M5PqbaYX2TiRVSkMANTEgGHXfmQxgxJR3QK6R+T018jvB0OUR4mJy7YnxQfJEU+B wgU= X-IronPort-AV: E=Sophos;i="5.73,387,1583218800"; d="scan'208";a="76494636" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 May 2020 05:56:55 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 13 May 2020 05:56:58 -0700 Received: from soft-dev15.microsemi.net (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Wed, 13 May 2020 05:56:52 -0700 From: Lars Povlsen List-Id: To: SoC Team , Arnd Bergmann , Stephen Boyd , Linus Walleij CC: Lars Povlsen , Steen Hegelund , Microchip Linux Driver Support , Olof Johansson , "Michael Turquette" , , , , , , Alexandre Belloni Subject: [PATCH 08/14] arm64: dts: sparx5: Add pinctrl support Date: Wed, 13 May 2020 14:55:26 +0200 Message-ID: <20200513125532.24585-9-lars.povlsen@microchip.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200513125532.24585-1-lars.povlsen@microchip.com> References: <20200513125532.24585-1-lars.povlsen@microchip.com> MIME-Version: 1.0 This add pinctrl support to the Microchip Sparx5 SoC. Reviewed-by: Alexandre Belloni Signed-off-by: Lars Povlsen --- arch/arm64/boot/dts/microchip/sparx5.dtsi | 26 +++++++++++++++++++++++ 1 file changed, 26 insertions(+) -- 2.26.2 diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index 3136b4369f507..45a60993789c8 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -102,6 +102,8 @@ gic: interrupt-controller@600300000 { }; uart0: serial@600100000 { + pinctrl-0 = <&uart_pins>; + pinctrl-names = "default"; compatible = "ns16550a"; reg = <0x6 0x00100000 0x20>; clocks = <&ahb_clk>; @@ -113,6 +115,8 @@ uart0: serial@600100000 { }; uart1: serial@600102000 { + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; compatible = "ns16550a"; reg = <0x6 0x00102000 0x20>; clocks = <&ahb_clk>; @@ -131,5 +135,27 @@ timer1: timer@600105000 { interrupts = ; }; + gpio: pinctrl@6110101e0 { + compatible = "microchip,sparx5-pinctrl"; + reg = <0x6 0x110101e0 0x90>, <0x6 0x10508010 0x100>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 64>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <2>; + + uart_pins: uart-pins { + pins = "GPIO_10", "GPIO_11"; + function = "uart"; + }; + + uart2_pins: uart2-pins { + pins = "GPIO_26", "GPIO_27"; + function = "uart2"; + }; + + }; + }; };