From patchwork Sat Jul 18 20:50:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 11672063 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EB3FB13A4 for ; Sat, 18 Jul 2020 20:51:07 +0000 (UTC) Received: by mail.kernel.org (Postfix) id E6AB622BEF; Sat, 18 Jul 2020 20:51:07 +0000 (UTC) Delivered-To: soc@kernel.org Received: from v6.sk (v6.sk [167.172.42.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B730B22B4E; Sat, 18 Jul 2020 20:51:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B730B22B4E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=v3.sk Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lkundrak@v6.sk Received: from localhost (v6.sk [IPv6:::1]) by v6.sk (Postfix) with ESMTP id B15A360D37; Sat, 18 Jul 2020 20:51:06 +0000 (UTC) From: Lubomir Rintel To: Arnd Bergmann , Olof Johansson List-Id: Cc: SoC Team , Rob Herring , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Lubomir Rintel Subject: [PATCH v2 10/13] ARM: dts: mmp2: Add the GPU Date: Sat, 18 Jul 2020 22:50:16 +0200 Message-Id: <20200718205019.184927-11-lkundrak@v3.sk> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200718205019.184927-1-lkundrak@v3.sk> References: <20200718205019.184927-1-lkundrak@v3.sk> MIME-Version: 1.0 There's a GC860 2D + 3D core. Signed-off-by: Lubomir Rintel --- arch/arm/boot/dts/mmp2.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi index 31592acd3ef4f..445bdcd50b9ed 100644 --- a/arch/arm/boot/dts/mmp2.dtsi +++ b/arch/arm/boot/dts/mmp2.dtsi @@ -5,6 +5,7 @@ */ #include +#include / { #address-cells = <1>; @@ -38,6 +39,17 @@ axi@d4200000 { /* AXI */ reg = <0xd4200000 0x00200000>; ranges; + gpu: gpu@d420d000 { + compatible = "vivante,gc"; + reg = <0xd420d000 0x4000>; + interrupts = <8>; + status = "disabled"; + clocks = <&soc_clocks MMP2_CLK_GPU_3D>, + <&soc_clocks MMP2_CLK_GPU_BUS>; + clock-names = "core", "bus"; + power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>; + }; + intc: interrupt-controller@d4282000 { compatible = "mrvl,mmp2-intc"; interrupt-controller;