From patchwork Sun Jul 26 04:39:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11685489 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A8637912 for ; Sun, 26 Jul 2020 04:40:11 +0000 (UTC) Received: by mail.kernel.org (Postfix) id A34C42076C; Sun, 26 Jul 2020 04:40:11 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pj1-f66.google.com (mail-pj1-f66.google.com [209.85.216.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 822362053B for ; Sun, 26 Jul 2020 04:40:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="YbtqbfsY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 822362053B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=0x0f.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=daniel@0x0f.com Received: by mail-pj1-f66.google.com with SMTP id a9so7348701pjd.3 for ; Sat, 25 Jul 2020 21:40:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dtjntBHs78gBBvXpncjh6tZl4Yv5U3MI9ZEGI0tw2Go=; b=YbtqbfsYYx3YQB8DjT3rSPrPxS1GMWDTkWQKIsOyZErTNno+XE2gPxqmitg/p58trr 5XNWdXtP1M3Xe8RxoIZjrStbig8OjmCnxzPjmrwmFJhToUl23JwPvLz9/lHGMMCH32aD ncBnF4wjLRKlWioazT9PJdirI/QuqIwX/qufY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dtjntBHs78gBBvXpncjh6tZl4Yv5U3MI9ZEGI0tw2Go=; b=hcuA01AyI2en8rGjWQIidYvWYP8oaAXB5Iz70715EHeusbkQwwqHgjyHr9pse/eizM 03BT1+29PqmMlQbeY4nb/aYjWaORjh/DlbZLGr5SiOpOcRTP0B4HAn79mT1a7cHXVJZu PJW62zmPcLZugBvj55Da/y+/Un8x3vIMhQEJe6cOk7AP87OyIEci+2juXbS9IBY5xP23 6tG49exHm/qMuthmsrh5BfkpGsNRZklnXXdXobbSOC2KjhN/9MDaBydkkrmaoOIemKPD 1zwJ2ebpCTAl06zKHynu6/0xpOjTCO4gVISKSS+VkpnGyqt3F75clfodSILdzRWZrbu3 xoFg== X-Gm-Message-State: AOAM531vPjZHGf1hx3pCDBjdKc9VnVVvKNmHg3CkKRJpc9EgVJg7/mdX mfUCkYkCLLAMsiKnHf2FPiO10kvJjlg= X-Google-Smtp-Source: ABdhPJyGXFfEbk1Up0QL8oQbe+ycIHVfA3VLtaxuSUcbU05RUoGvG8/6nx8ComJuhhjWwmDLxJYwBQ== X-Received: by 2002:a17:90a:2170:: with SMTP id a103mr5214636pje.198.1595738410839; Sat, 25 Jul 2020 21:40:10 -0700 (PDT) Received: from shiro.work (p532183-ipngn200506sizuokaden.shizuoka.ocn.ne.jp. [153.199.2.183]) by smtp.googlemail.com with ESMTPSA id t1sm10507372pje.55.2020.07.25.21.40.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Jul 2020 21:40:10 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Cc: arnd@arndb.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Daniel Palmer Subject: [PATCH 6/7] ARM:mstar: Add syscon node for "pmsleep" area Date: Sun, 26 Jul 2020 13:39:47 +0900 Message-Id: <20200726043948.1357573-7-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200726043948.1357573-1-daniel@0x0f.com> References: <20200726043948.1357573-1-daniel@0x0f.com> MIME-Version: 1.0 MStar v7 SoCs contain a region of registers that are in the always on domain that the vendor code calls the "pmsleep" area. This area contains registers for a broad range of functionality and needs to be shared between drivers. This patch adds a syscon node for the pmsleep area so that other drivers can access registers in the area. Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-v7.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index a73b1d162dfd..c8b192569d05 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -73,6 +73,11 @@ riu: bus@1f000000 { #size-cells = <1>; ranges = <0x0 0x1f000000 0x00400000>; + pmsleep: syscon@1c00 { + compatible = "syscon"; + reg = <0x1c00 0x100>; + }; + l3bridge: l3bridge@204400 { compatible = "mstar,l3bridge"; reg = <0x204400 0x200>;