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Thu, 13 Jan 2022 21:24:51 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.108.73.139]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20220113122448epsmtip25b5a0b0f3b13357571a8679d99b5e964~J1AxdzOLs1247412474epsmtip21; Thu, 13 Jan 2022 12:24:48 +0000 (GMT) From: Alim Akhtar To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: Cc: soc@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, olof@lixom.net, linus.walleij@linaro.org, catalin.marinas@arm.com, robh+dt@kernel.org, krzysztof.kozlowski@canonical.com, s.nawrocki@samsung.com, linux-samsung-soc@vger.kernel.org, pankaj.dubey@samsung.com, Alim Akhtar , linux-fsd@tesla.com, jic23@kernel.org, linux-iio@vger.kernel.org, Tamseel Shams Subject: [PATCH 21/23] iio: adc: exynos-adc: Add support for ADC V3 controller Date: Thu, 13 Jan 2022 17:41:41 +0530 Message-Id: <20220113121143.22280-22-alim.akhtar@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220113121143.22280-1-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprBJsWRmVeSWpSXmKPExsWy7bCmpq6I1INEg9+vRCwezNvGZvF+WQ+j xfwj51gtHjStYrLY+PYHk8WUP8uZLDY9vsZq8bHnHqvFw1fhFvOOvGOxuLxrDpvFjPP7mCzu ti5mtzh1/TObxaKtX9gtWvceYbc4/Kad1eLx9T9sDkIea+atYfSY1dDL5rFpVSebx51re9g8 Ni+p97hyoonVo2/LKkaPf01z2T0+b5IL4IzKtslITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw 1DW0tDBXUshLzE21VXLxCdB1y8wB+kdJoSwxpxQoFJBYXKykb2dTlF9akqqQkV9cYquUWpCS U2BSoFecmFtcmpeul5daYmVoYGBkClSYkJ1xb+0D5oJzyhWzX/A3MF6U7WLk5JAQMJHYMucx O4gtJLCbUeL/H4MuRi4g+xOjxK2H19ggEt8YJdbt1oBrWLGXCaJoL6PE1+V9UE4Lk8T6M+8Y QarYBLQl7k7fwgRiiwi4Sdxo7AArYhbYxCwx7ewdsH3CAgESk1b8ZQWxWQRUJX6vbAdr4BWw lTg69xU7xDp5idUbDjB3MXJwcALF767KA5kjIbCFQ+L25LdMEDUuEhtbexghbGGJV8e3QPVK Sbzsb2MH6ZUQyJbo2WUMEa6RWDrvGAuEbS9x4MocFpASZgFNifW79EHCzAJ8Er2/nzBBdPJK dLQJQVSrSjS/uwrVKS0xsbubFaLEQ6Lvky8kFCYwSpw+eZJtAqPsLIShCxgZVzFKphYU56an FpsWGOallsMjKTk/dxMjOIlqee5gvPvgg94hRiYOxkOMEhzMSiK8/UX3E4V4UxIrq1KL8uOL SnNSiw8xmgIDbCKzlGhyPjCN55XEG5pYGpiYmZmZWBqbGSqJ855O35AoJJCeWJKanZpakFoE 08fEwSnVwGS9QGTH1kULFgv2BR37LZ4j/+f7uT7R08+rjWzyZ1klb3u/7ajexS2Hiw0Xcjyz UDsUX6SY9TVIeSu/2gzFUmP3uj/HHf7suL+Jk13n/JtPBjGfz50JW8+3JiTcJnWj5fwFDimy ghfvsud6+kQcua1tsburKsNTc7X9vbfduhazmPfdPXDHdFWXW2pweK6G/7dvz7/N2/jexc3I tFcj+vXhS2tyn/qFasTWb21//X53VaDuqcO3zKIk6padum3k9ODhfUMeuafJHK2hb/ZekN7p oyTdpvUnxVLkedHPr/EPl373lZjjuPlkjfYl/aZnl7nXWidlv7Pa/1Ip4eNOy6RTv3Iqnfg/ Hw/4u/vvDx4lluKMREMt5qLiRABlDZCuKwQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrPLMWRmVeSWpSXmKPExsWy7bCSvK6w1INEg98bVSwezNvGZvF+WQ+j xfwj51gtHjStYrLY+PYHk8WUP8uZLDY9vsZq8bHnHqvFw1fhFvOOvGOxuLxrDpvFjPP7mCzu ti5mtzh1/TObxaKtX9gtWvceYbc4/Kad1eLx9T9sDkIea+atYfSY1dDL5rFpVSebx51re9g8 Ni+p97hyoonVo2/LKkaPf01z2T0+b5IL4IzisklJzcksSy3St0vgyri39gFzwTnlitkv+BsY L8p2MXJySAiYSGxZsZepi5GLQ0hgN6PEwjNvWSES0hLXN05gh7CFJVb+e84OUdTEJHHm+nkm kASbgLbE3elbwGwRAQ+Jtn/3mEGKmAWOMEtsP3mSBSQhLOAnMfHvNbAiFgFVid8r28FsXgFb iaNzX0FtkJdYveEAUDMHBydQ/O6qPJCwkICNxLlX69kmMPItYGRYxSiZWlCcm55bbFhgmJda rlecmFtcmpeul5yfu4kRHAdamjsYt6/6oHeIkYmD8RCjBAezkghvf9H9RCHelMTKqtSi/Pii 0pzU4kOM0hwsSuK8F7pOxgsJpCeWpGanphakFsFkmTg4pRqYGgTburXyTgQy8/+YZPEkxsTl ULKDenRV0fyb07hT/XgmZ3tL/pozPeEJ38lMgcnv3K5eXub/Zu/269uSQ48ZKNW3SxiIefg6 rljirDj5PN+/tjc26r+tPrJZLHvmtudCi3e3feFqI34bv8l2/VKcNzyKl4mmBkxb+L2K79z/ yel7+lZr7zqQ88LaoPnG0uJ16tdeHP+X8XZu9QrRFddqFecU3vNyFyvvj/44ZXqNteKENad2 T1cL+/D7vEUxZ4X7qs1aN+2r1nu3Rt3YN9X13C+n1GdtV5OMNz1s09wya/fEP19cVlm/nLet xtDD79FB58R9kbsjP5zvCqma3ZcXzl+p3+/T/DOEX1BsQn+eEktxRqKhFnNRcSIAEBg6fvIC AAA= X-CMS-MailID: 20220113122452epcas5p201a3a87d0e9c0e9f449a90ed62de1f1c X-Msg-Generator: CA CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220113122452epcas5p201a3a87d0e9c0e9f449a90ed62de1f1c References: <20220113121143.22280-1-alim.akhtar@samsung.com> Exynos's ADC-V3 has some difference in registers set, number of programmable channels (16 channel) etc. This patch adds support for ADC-V3 controller version. Cc: linux-fsd@tesla.com Cc: jic23@kernel.org Cc: linux-iio@vger.kernel.org Signed-off-by: Tamseel Shams Signed-off-by: Alim Akhtar --- drivers/iio/adc/exynos_adc.c | 74 +++++++++++++++++++++++++++++++++++- 1 file changed, 72 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c index 3b3868aa2533..61752e798fd6 100644 --- a/drivers/iio/adc/exynos_adc.c +++ b/drivers/iio/adc/exynos_adc.c @@ -55,6 +55,11 @@ #define ADC_V2_INT_ST(x) ((x) + 0x14) #define ADC_V2_VER(x) ((x) + 0x20) +/* ADC_V3 register definitions */ +#define ADC_V3_DAT(x) ((x) + 0x08) +#define ADC_V3_DAT_SUM(x) ((x) + 0x0C) +#define ADC_V3_DBG_DATA(x) ((x) + 0x1C) + /* Bit definitions for ADC_V1 */ #define ADC_V1_CON_RES (1u << 16) #define ADC_V1_CON_PRSCEN (1u << 14) @@ -92,6 +97,7 @@ /* Bit definitions for ADC_V2 */ #define ADC_V2_CON1_SOFT_RESET (1u << 2) +#define ADC_V2_CON1_SOFT_NON_RESET (1u << 1) #define ADC_V2_CON2_OSEL (1u << 10) #define ADC_V2_CON2_ESEL (1u << 9) @@ -100,6 +106,7 @@ #define ADC_V2_CON2_ACH_SEL(x) (((x) & 0xF) << 0) #define ADC_V2_CON2_ACH_MASK 0xF +#define MAX_ADC_V3_CHANNELS 16 #define MAX_ADC_V2_CHANNELS 10 #define MAX_ADC_V1_CHANNELS 8 #define MAX_EXYNOS3250_ADC_CHANNELS 2 @@ -164,6 +171,7 @@ struct exynos_adc_data { void (*exit_hw)(struct exynos_adc *info); void (*clear_irq)(struct exynos_adc *info); void (*start_conv)(struct exynos_adc *info, unsigned long addr); + irqreturn_t (*adc_isr)(int irq, void *dev_id); }; static void exynos_adc_unprepare_clk(struct exynos_adc *info) @@ -484,6 +492,59 @@ static const struct exynos_adc_data exynos7_adc_data = { .start_conv = exynos_adc_v2_start_conv, }; +static void exynos_adc_v3_init_hw(struct exynos_adc *info) +{ + u32 con2; + + writel(ADC_V2_CON1_SOFT_RESET, ADC_V2_CON1(info->regs)); + + writel(ADC_V2_CON1_SOFT_NON_RESET, ADC_V2_CON1(info->regs)); + + con2 = ADC_V2_CON2_C_TIME(6); + writel(con2, ADC_V2_CON2(info->regs)); + + /* Enable interrupts */ + writel(1, ADC_V2_INT_EN(info->regs)); +} + +static void exynos_adc_v3_exit_hw(struct exynos_adc *info) +{ + u32 con2; + + con2 = readl(ADC_V2_CON2(info->regs)); + con2 &= ~ADC_V2_CON2_C_TIME(7); + writel(con2, ADC_V2_CON2(info->regs)); + + /* Disable interrupts */ + writel(0, ADC_V2_INT_EN(info->regs)); +} + +static irqreturn_t exynos_adc_v3_isr(int irq, void *dev_id) +{ + struct exynos_adc *info = (struct exynos_adc *)dev_id; + u32 mask = info->data->mask; + + info->value = readl(ADC_V3_DAT(info->regs)) & mask; + + if (info->data->clear_irq) + info->data->clear_irq(info); + + complete(&info->completion); + + return IRQ_HANDLED; +} + +static const struct exynos_adc_data exynos_adc_v3_adc_data = { + .num_channels = MAX_ADC_V3_CHANNELS, + .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */ + + .init_hw = exynos_adc_v3_init_hw, + .exit_hw = exynos_adc_v3_exit_hw, + .clear_irq = exynos_adc_v2_clear_irq, + .start_conv = exynos_adc_v2_start_conv, + .adc_isr = exynos_adc_v3_isr, +}; + static const struct of_device_id exynos_adc_match[] = { { .compatible = "samsung,s3c2410-adc", @@ -518,6 +579,9 @@ static const struct of_device_id exynos_adc_match[] = { }, { .compatible = "samsung,exynos7-adc", .data = &exynos7_adc_data, + }, { + .compatible = "samsung,exynos-adc-v3", + .data = &exynos_adc_v3_adc_data, }, {}, }; @@ -719,6 +783,12 @@ static const struct iio_chan_spec exynos_adc_iio_channels[] = { ADC_CHANNEL(7, "adc7"), ADC_CHANNEL(8, "adc8"), ADC_CHANNEL(9, "adc9"), + ADC_CHANNEL(10, "adc10"), + ADC_CHANNEL(11, "adc11"), + ADC_CHANNEL(12, "adc12"), + ADC_CHANNEL(13, "adc13"), + ADC_CHANNEL(14, "adc14"), + ADC_CHANNEL(15, "adc15"), }; static int exynos_adc_remove_devices(struct device *dev, void *c) @@ -885,8 +955,8 @@ static int exynos_adc_probe(struct platform_device *pdev) mutex_init(&info->lock); - ret = request_irq(info->irq, exynos_adc_isr, - 0, dev_name(&pdev->dev), info); + ret = request_irq(info->irq, info->data->adc_isr ? info->data->adc_isr : + exynos_adc_isr, 0, dev_name(&pdev->dev), info); if (ret < 0) { dev_err(&pdev->dev, "failed requesting irq, irq = %d\n", info->irq);