From patchwork Fri Apr 22 15:09:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 12823658 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F28AC433F5 for ; Fri, 22 Apr 2022 15:11:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id 84432C385A8; Fri, 22 Apr 2022 15:11:01 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.kernel.org (Postfix) with ESMTPS id 77ED3C385A4; Fri, 22 Apr 2022 15:11:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org 77ED3C385A4 Authentication-Results: smtp.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.kernel.org; spf=pass smtp.mailfrom=foss.st.com Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 23MArkCN014485; Fri, 22 Apr 2022 17:10:58 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=2oCYMBw/x1hMa3e4FO3HJHMTI95KTUQPnzzTlU/fH5w=; b=fCLrc4XuvsIcJgjtJtwox1Ua61ScNXVNBDFrKkBWquoyQwocVL+hlBtWjqp2JA24oiWl hSNo7DKo11yJgXBLEZnJZaQc/lNnmwKwZNEAVTOYPU50sPuEaj8Y+K/X20XJcC10TEWS +5ABIH8l9U5IT8hWrqDp9Cyt57qEQN4ohXYP81KQEwz14MuZTjhn2r91GwQb6VAlYSks fEnq2OL1u23pevN6aeYXR5/NfrRFZkX2dv/h4e09hckyBUjPexz6B1MbqnnBSUecHW22 rVl9a5OI9oDAh4US8lkchNvSMEcQji3CeCiOH21pzStzsbQFAm1oc5yno0HsZ649gsKO mw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3ffpqh9mhn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Apr 2022 17:10:57 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7832010002A; Fri, 22 Apr 2022 17:10:57 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 71D26233C64; Fri, 22 Apr 2022 17:10:57 +0200 (CEST) Received: from localhost (10.75.127.49) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Fri, 22 Apr 2022 17:10:57 +0200 From: Alexandre Torgue List-Id: To: , , Krzysztof Kozlowski , , Stephen Boyd , Philipp Zabel CC: , , Alexandre Torgue , , , Marek Vasut , Ahmad Fatoum , Subject: [PATCH 5/8] ARM: stm32: select OPTEE on MPU family Date: Fri, 22 Apr 2022 17:09:49 +0200 Message-ID: <20220422150952.20587-6-alexandre.torgue@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220422150952.20587-1-alexandre.torgue@foss.st.com> References: <20220422150952.20587-1-alexandre.torgue@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-04-22_04,2022-04-22_01,2022-02-23_01 Select CONFIG_OPTEE for STM32MP15 and STM32MP13 by default. Final activation will done thanks to device tree. Signed-off-by: Alexandre Torgue diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig index 98145031586f..b322cf2a136f 100644 --- a/arch/arm/mach-stm32/Kconfig +++ b/arch/arm/mach-stm32/Kconfig @@ -6,6 +6,8 @@ menuconfig ARCH_STM32 select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 select ARM_GIC if ARCH_MULTI_V7 select ARM_PSCI if ARCH_MULTI_V7 + select TEE if ARCH_MULTI_V7 + select OPTEE if ARCH_MULTI_V7 select ARM_AMBA select ARCH_HAS_RESET_CONTROLLER select CLKSRC_STM32