From patchwork Fri Feb 3 03:48:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Durai Manickam KR X-Patchwork-Id: 13126959 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 927A7C636CC for ; Fri, 3 Feb 2023 03:49:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id 50F49C4339E; Fri, 3 Feb 2023 03:49:05 +0000 (UTC) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.kernel.org (Postfix) with ESMTPS id 01565C433EF; Fri, 3 Feb 2023 03:49:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org 01565C433EF Authentication-Results: smtp.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.kernel.org; spf=pass smtp.mailfrom=microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675396141; x=1706932141; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1AkioPAmaGGCya2gZ7629DIo0jjKlLKAh9uNoP/tX6M=; b=kVzAg5Kzo4fQF4J0LPehpkVVadaTiuvKLt4SXywuPYlRllNI2DLLv90D dp9CC6gMplmrxR/TPiQBttZrZEYlkI6GynzW/AC9eLyvX+g31xiwNQWpW SL5l/3ihP7REXIL6+aGAVZkRhE9Z0ZZcBtZNzR6Wbht9h37Uv5TWbIsNF 6g6BNNEaMWJECND7cd1PL+J6lqgFwk06sZ0+ZAyXsHGg7jOjfjKdm4NAy JqRruXGKYjl2HSCwmZNvveLy9RvehW2+t9OKbjO9HQMv4iYsxLpWJ5NYF 5hxyFihEEsPhsdX+aIbYleFIJUTwMtl59BSFD3+7x7B9UK4/56TrOFf44 Q==; X-IronPort-AV: E=Sophos;i="5.97,269,1669100400"; d="scan'208";a="210425618" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 02 Feb 2023 20:49:00 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Thu, 2 Feb 2023 20:49:01 -0700 Received: from che-lt-i66125lx.amer.actel.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Thu, 2 Feb 2023 20:48:51 -0700 From: Durai Manickam KR List-Id: To: , , , , , , , , , , , , , , , , , , , , , , , , CC: Durai Manickam KR Subject: [PATCH v5 1/8] ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom functions Date: Fri, 3 Feb 2023 09:18:26 +0530 Message-ID: <20230203034833.451461-2-durai.manickamkr@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230203034833.451461-1-durai.manickamkr@microchip.com> References: <20230203034833.451461-1-durai.manickamkr@microchip.com> MIME-Version: 1.0 From: Manikandan Muralidharan Fixed the label numbering of the flexcom functions so that all 13 flexcom functions of sam9x60 are in the following order when the missing flexcom functions are added: flx0: uart0, spi0, i2c0 flx1: uart1, spi1, i2c1 flx2: uart2, spi2, i2c2 flx3: uart3, spi3, i2c3 flx4: uart4, spi4, i2c4 flx5: uart5, spi5, i2c5 flx6: uart6, i2c6 flx7: uart7, i2c7 flx8: uart8, i2c8 flx9: uart9, i2c9 flx10: uart10, i2c10 flx11: uart11, i2c11 flx12: uart12, i2c12 Signed-off-by: Manikandan Muralidharan Signed-off-by: Durai Manickam KR Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/at91-sam9x60ek.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts index d929c1ba5789..cf5d786531f2 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -16,8 +16,8 @@ / { aliases { i2c0 = &i2c0; - i2c1 = &i2c1; - serial1 = &uart1; + i2c1 = &i2c6; + serial1 = &uart5; }; chosen { @@ -234,7 +234,7 @@ &flx4 { atmel,flexcom-mode = ; status = "disabled"; - spi0: spi@400 { + spi4: spi@400 { compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi"; reg = <0x400 0x200>; interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; @@ -253,7 +253,7 @@ &flx5 { atmel,flexcom-mode = ; status = "okay"; - uart1: serial@200 { + uart5: serial@200 { compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; atmel,usart-mode = ; @@ -279,7 +279,7 @@ &flx6 { atmel,flexcom-mode = ; status = "okay"; - i2c1: i2c@600 { + i2c6: i2c@600 { compatible = "microchip,sam9x60-i2c"; reg = <0x600 0x200>; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; @@ -439,7 +439,7 @@ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; - pinctrl_flx5_default: flx_uart { + pinctrl_flx5_default: flx5_uart { atmel,pins =