From patchwork Tue Feb 7 11:06:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Durai Manickam KR X-Patchwork-Id: 13131399 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 81DE7C636CD for ; Tue, 7 Feb 2023 11:08:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id 6893CC433EF; Tue, 7 Feb 2023 11:08:08 +0000 (UTC) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.kernel.org (Postfix) with ESMTPS id 2293BC4339C; Tue, 7 Feb 2023 11:08:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org 2293BC4339C Authentication-Results: smtp.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: smtp.kernel.org; spf=pass smtp.mailfrom=microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1675768087; x=1707304087; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kibqO0YpM7UaIfNnh1seK66BbS3IQS1tOIJMA8jsTZ0=; b=nJg7HWkIRHudfYmR/DBFZHQBbVCAkbd373ZaePaw/2j+hFmqxfmHMZ1i ty+IwPM1yEdrM40ta0tQd0Qi2k22s+s3mStC/bez25Qkuy6kz2JvjCUdl qzkFQ/eh1rDmvKszgoHKNpQOw2XwJWoefwSw8+ouqxfr2C/QooJ6BXjax q5U+BFkI6mmVI3MjjqmHI11fIm0QwuKJGhNdXJvdB+zXGAXm77fGGp4ov IqiZOemDJ9neeGaXdom9DrRQqyLpwYYzAMNMalGOysE6d63BxUff5xLMW gz130rFsDVFyhAjMESngW8XiycTvm0xd9WOEotPxbl4OurvM0ZeqVjoux g==; X-IronPort-AV: E=Sophos;i="5.97,278,1669100400"; d="scan'208";a="199283485" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Feb 2023 04:08:05 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Tue, 7 Feb 2023 04:08:03 -0700 Received: from che-lt-i66125lx.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Tue, 7 Feb 2023 04:07:53 -0700 From: Durai Manickam KR List-Id: To: , , , , , , , , , , , , , , , , , , , , , , , , CC: Durai Manickam KR Subject: [PATCH v6 4/8] ARM: dts: at91: sam9x60: Specify the FIFO size for the Flexcom UART Date: Tue, 7 Feb 2023 16:36:47 +0530 Message-ID: <20230207110651.197268-5-durai.manickamkr@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230207110651.197268-1-durai.manickamkr@microchip.com> References: <20230207110651.197268-1-durai.manickamkr@microchip.com> MIME-Version: 1.0 From: Manikandan Muralidharan The UART submodule in Flexcom has 16-byte Transmit and Receive FIFOs. Signed-off-by: Manikandan Muralidharan Signed-off-by: Durai Manickam KR Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/sam9x60.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index ee6cc4329ae4..1e401a919f56 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -209,6 +209,7 @@ AT91_XDMAC_DT_PER_IF(1) | clock-names = "usart"; atmel,use-dma-rx; atmel,use-dma-tx; + atmel,fifo-size = <16>; status = "disabled"; }; };