From patchwork Fri Jun 2 13:28:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 13265328 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6F811C7EE2C for ; Fri, 2 Jun 2023 13:29:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id 52548C433D2; Fri, 2 Jun 2023 13:29:14 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.kernel.org (Postfix) with ESMTPS id E05ABC4339B; Fri, 2 Jun 2023 13:29:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org E05ABC4339B Authentication-Results: smtp.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.kernel.org; spf=pass smtp.mailfrom=foss.st.com Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 352Bxqhf001514; Fri, 2 Jun 2023 15:29:07 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=AM1f4tJRimilxF3sdJas9PGFkZRJhM/VZR2iX7zQFb4=; b=TXDSsE2emHbj4tusgGl5fUiyMZ0RhNp/HzxUvNrHH19zaEbAbj0o9H3Ge2bDeu0S5qnn 41F3WsRlT+YoEm7rMzWxIF7blwt62yM6rKvstTfvJVoryKSLe69f8tnSY6/0WNH0QmbH +SVRx94j3oDu0DU/K5XLwoT8VDTbwgddnWii+wsP9CHX86rrezVmDuY5noyU2VxamEYz bb2jTZBX9EcoKDCh4O8KO/OPoeqzfFkUaQ5wVD7j+HekQOQcAepiAHtqH68DFspRLso2 WGy/mZIWQrAhcEUVLUZn9Yybj1pMKuDJGwlTlRRl+ofH50NIei0lyM00f4sFtJjbYx+f 4w== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3qweqepgut-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 02 Jun 2023 15:29:07 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id ED02A100034; Fri, 2 Jun 2023 15:29:06 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id E5C2F236927; Fri, 2 Jun 2023 15:29:06 +0200 (CEST) Received: from localhost (10.201.21.93) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 2 Jun 2023 15:29:06 +0200 From: Alexandre Torgue List-Id: To: , , Conor Dooley , Linus Walleij , Catalin Marinas , Will Deacon , Arnd Bergmann , Olof Johansson , CC: , , Alexandre Torgue , , , Subject: [PATCH v2 03/10] dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon Date: Fri, 2 Jun 2023 15:28:52 +0200 Message-ID: <20230602132859.16442-4-alexandre.torgue@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230602132859.16442-1-alexandre.torgue@foss.st.com> References: <20230602132859.16442-1-alexandre.torgue@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.93] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-02_10,2023-06-02_02,2023-05-22_02 From: Patrick Delaunay Add the new syscon compatible for STM32MP25 syscfg = "st,stm32mp25-syscfg". Reorder enum following ASCII oredering. Signed-off-by: Patrick Delaunay Signed-off-by: Alexandre Torgue Acked-by: Krzysztof Kozlowski diff --git a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml index ad8e51aa01b0..b63ff591ef8f 100644 --- a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml @@ -15,12 +15,13 @@ properties: oneOf: - items: - enum: - - st,stm32mp157-syscfg - - st,stm32mp151-pwr-mcu - - st,stm32-syscfg - st,stm32-power-config + - st,stm32-syscfg - st,stm32-tamp - st,stm32f4-gcan + - st,stm32mp151-pwr-mcu + - st,stm32mp157-syscfg + - st,stm32mp25-syscfg - const: syscon - items: - const: st,stm32-tamp