[GIT,PULL] arm64: soc: Xilinx SoC changes for v5.5

Pull-request

https://github.com/Xilinx/linux-xlnx.git tags/zynqmp-soc-for-v5.5

Message

Michal Simek Nov. 7, 2019, 9:19 a.m. UTC

Hi,

please pull these patches to your tree. They are extending current
Xilinx firmware interface to cover new Xilinx chip called Versal.

Thanks,
Michal

The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c:

  Linux 5.4-rc1 (2019-09-30 10:35:40 -0700)

are available in the Git repository at:

  https://github.com/Xilinx/linux-xlnx.git tags/zynqmp-soc-for-v5.5

for you to fetch changes up to af3f1afac38d34083faad852172d0ec82749c046:

  firmware: xilinx: Add support for versal soc (2019-10-16 12:55:37 +0200)

----------------------------------------------------------------
arm64: soc: Xilinx SoC changes for v5.5

- Extend firmware interface to cover Versal chip

----------------------------------------------------------------
Jolly Shah (2):
      dt-bindings: firmware: Add bindings for Versal firmware
      firmware: xilinx: Add support for versal soc

Tejas Patel (1):
      soc: xilinx: Set CAP_UNUSABLE requirement for versal while
powering down domain

 Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt | 16 +++++++++++++++-
 drivers/firmware/xilinx/zynqmp.c
    |  8 ++++++--
 drivers/soc/xilinx/zynqmp_pm_domains.c
    | 10 ++++++++--
 include/linux/firmware/xlnx-zynqmp.h
    |  3 ++-
 4 files changed, 31 insertions(+), 6 deletions(-)

Comments

[e-mail] Nov. 8, 2019, 6:42 p.m. UTC | #1

Hello:

This pull request was applied to soc/soc.git (refs/heads/for-next).

On Thu, 7 Nov 2019 10:19:40 +0100 you wrote:
> Hi,
> 
> please pull these patches to your tree. They are extending current
> Xilinx firmware interface to cover new Xilinx chip called Versal.
> 
> Thanks,
> Michal
> 
> [...]


Here is a summary with links:
  - [GIT,PULL] arm64: soc: Xilinx SoC changes for v5.5
    https://git.kernel.org/soc/soc/c/44a39847787b022c9f64b48b41c9d2f9dcd815f4

You are awesome, thank you!