From patchwork Mon Jun 17 01:46:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Masami Hiramatsu (Google)" X-Patchwork-Id: 13699880 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D38E115B143; Mon, 17 Jun 2024 01:46:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718588806; cv=none; b=NEZ44qZ5rWxJxUgxo6JAAHkPMjtPgARiOeTfs1TxoF0X+Kw0z2UfSYohP39xY7iETw5FLtu7LWsszLxMOpu2maOkKuPO6e0OyOmiBjiJ1EGIGUeGXKnjGZXBUnh2d8zQqjrUFrIoIU9KapMe/Ma5nEuiyOysjIMAI0PBLdmgBho= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718588806; c=relaxed/simple; bh=a7Acn7TQ4Iwo2VD7UsmloW71L1XLgtVJhdhvEmYlufU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=Nj9HEwdCY3H+rxyegiYSmhu5fGBb0mTwaNU+SLURDzCZLmRLto475VTi6HcWH8NnKu6lxFNGr2d6ZcAqNqQOGJ+aFALYnIPtyNYV5H3GGddMraKde/UlfIGY09mg8ZURjHTifDY+FahUCvRzVaTjcnqM5PvB3LCIBXjtrCWdFqU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GsHUoEri; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GsHUoEri" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3B6C9C2BBFC; Mon, 17 Jun 2024 01:46:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1718588806; bh=a7Acn7TQ4Iwo2VD7UsmloW71L1XLgtVJhdhvEmYlufU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GsHUoEriOORs5MyU3JbWHr45SjDb6AdlA5ZlGlHf0qZJLqpNkBDJzOA7ZIE/SKAqN LvC7B3laNmTs10QoESD4ologfxr6+wdzRTmyH+89fRL85IW/4e+3HsuE6ks0gk/bNu 0jDoD78qq+1RrqcMDyBCc1yEL4cD5+Eo7rpc97i0Bfxtfpbtr15N6jrPPvFfwXWM2Q GWzD7IQjHqhvY5m11viKuCMsZS8x+yKjqh7U0Gg4NqpZZqBcpJK2QijdAfeQNqZuTl yaeBXDzCTvc8hUk+ZPoc5GWr/0pstarLk6O6e4V9+FXSfDNfwszwmGOWRQ5h2ZKfZv Yn4Irjd9pe/AQ== From: "Masami Hiramatsu (Google)" To: Alexei Starovoitov , Steven Rostedt , Florent Revest Cc: linux-trace-kernel@vger.kernel.org, LKML , Martin KaFai Lau , bpf , Sven Schnelle , Alexei Starovoitov , Jiri Olsa , Arnaldo Carvalho de Melo , Daniel Borkmann , Alan Maguire , Mark Rutland , Peter Zijlstra , Thomas Gleixner , Guo Ren Subject: [PATCH v11 01/18] tracing: Add a comment about ftrace_regs definition Date: Mon, 17 Jun 2024 10:46:40 +0900 Message-Id: <171858879989.288820.8579896574302291995.stgit@devnote2> X-Mailer: git-send-email 2.34.1 In-Reply-To: <171858878797.288820.237119113242007537.stgit@devnote2> References: <171858878797.288820.237119113242007537.stgit@devnote2> User-Agent: StGit/0.19 Precedence: bulk X-Mailing-List: linux-trace-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Masami Hiramatsu (Google) To clarify what will be expected on ftrace_regs, add a comment to the architecture independent definition of the ftrace_regs. Signed-off-by: Masami Hiramatsu (Google) Acked-by: Mark Rutland --- Changes in v8: - Update that the saved registers depends on the context. Changes in v3: - Add instruction pointer Changes in v2: - newly added. --- include/linux/ftrace.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h index 845c2ab0bc1c..3c8a19ea8f45 100644 --- a/include/linux/ftrace.h +++ b/include/linux/ftrace.h @@ -117,6 +117,32 @@ extern int ftrace_enabled; #ifndef CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS +/** + * ftrace_regs - ftrace partial/optimal register set + * + * ftrace_regs represents a group of registers which is used at the + * function entry and exit. There are three types of registers. + * + * - Registers for passing the parameters to callee, including the stack + * pointer. (e.g. rcx, rdx, rdi, rsi, r8, r9 and rsp on x86_64) + * - Registers for passing the return values to caller. + * (e.g. rax and rdx on x86_64) + * - Registers for hooking the function call and return including the + * frame pointer (the frame pointer is architecture/config dependent) + * (e.g. rip, rbp and rsp for x86_64) + * + * Also, architecture dependent fields can be used for internal process. + * (e.g. orig_ax on x86_64) + * + * On the function entry, those registers will be restored except for + * the stack pointer, so that user can change the function parameters + * and instruction pointer (e.g. live patching.) + * On the function exit, only registers which is used for return values + * are restored. + * + * NOTE: user *must not* access regs directly, only do it via APIs, because + * the member can be changed according to the architecture. + */ struct ftrace_regs { struct pt_regs regs; };