| Message ID | 20231118193248.1296798-16-yazen.ghannam@amd.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | MCA Updates | expand |
diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c index b45ee297cde2..462ba9ff997b 100644 --- a/arch/x86/kernel/cpu/mce/amd.c +++ b/arch/x86/kernel/cpu/mce/amd.c @@ -1434,7 +1434,7 @@ int mce_threshold_create_device(unsigned int cpu) struct threshold_bank **bp; int err; - if (!mce_flags.amd_threshold) + if (!this_cpu_read(bank_map)) return 0; bp = this_cpu_read(threshold_banks); diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index a81c0df217e2..bdbc32f10a9a 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -2004,7 +2004,6 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c) mce_flags.overflow_recov = !!cpu_has(c, X86_FEATURE_OVERFLOW_RECOV); mce_flags.succor = !!cpu_has(c, X86_FEATURE_SUCCOR); mce_flags.smca = !!cpu_has(c, X86_FEATURE_SMCA); - mce_flags.amd_threshold = 1; } } diff --git a/arch/x86/kernel/cpu/mce/internal.h b/arch/x86/kernel/cpu/mce/internal.h index 8ed1035f013b..fca7499e1bf4 100644 --- a/arch/x86/kernel/cpu/mce/internal.h +++ b/arch/x86/kernel/cpu/mce/internal.h @@ -162,9 +162,6 @@ struct mce_vendor_flags { /* Zen IFU quirk */ zen_ifu_quirk : 1, - /* AMD-style error thresholding banks present. */ - amd_threshold : 1, - /* Pentium, family 5-style MCA */ p5 : 1,
AMD systems optionally support MCA Thresholding. This feature is discovered by checking capability bits in the MCA_MISC* registers. Currently, MCA Thresholding is set up in two passes. The first is during CPU init where available banks are detected, and the "bank_map" variable is updated. The second is during sysfs/device init when the thresholding data structures are allocated and hardware is fully configured. During device init, the "threshold_banks" array is allocated even if no available banks were discovered. Furthermore, the thresholding reset flow checks if the top-level "threshold_banks" array is non-NULL, but it doesn't check if individual "threshold_bank" structures are non-NULL. This is avoided because the hardware interrupt is not enabled in this case. But this issue becomes present if enabling the interrupt when the thresholding data structures are not initialized. Check "bank_map" to determine if the thresholding structures should be allocated and initialized. Also, remove "mce_flags.amd_threshold" which is redundant when checking "bank_map". Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> --- arch/x86/kernel/cpu/mce/amd.c | 2 +- arch/x86/kernel/cpu/mce/core.c | 1 - arch/x86/kernel/cpu/mce/internal.h | 3 --- 3 files changed, 1 insertion(+), 5 deletions(-)