| Message ID | 20241127172908.17149-2-andybnac@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v3,1/7] riscv: ftrace: support fastcc in Clang for WITH_ARGS | expand |
Andy Chiu <andybnac@gmail.com> writes: > From: Andy Chiu <andy.chiu@sifive.com> > > Some caller-saved registers which are not defined as function arguments > in the ABI can still be passed as arguments when the kernel is compiled > with Clang. As a result, we must save and restore those registers to > prevent ftrace from clobbering them. > > - [1]: https://reviews.llvm.org/D68559 > > Reported-by: Evgenii Shatokhin <e.shatokhin@yadro.com> > Closes: https://lore.kernel.org/linux-riscv/7e7c7914-445d-426d-89a0-59a9199c45b1@yadro.com/ > Acked-by: Nathan Chancellor <nathan@kernel.org> > Signed-off-by: Andy Chiu <andy.chiu@sifive.com> Fixes tag? Reviewed-by: Björn Töpel <bjorn@rivosinc.com>
Hi, On 03.12.2024 15:05, Björn Töpel wrote: > > Andy Chiu <andybnac@gmail.com> writes: > >> From: Andy Chiu <andy.chiu@sifive.com> >> >> Some caller-saved registers which are not defined as function arguments >> in the ABI can still be passed as arguments when the kernel is compiled >> with Clang. As a result, we must save and restore those registers to >> prevent ftrace from clobbering them. >> >> - [1]: https://reviews.llvm.org/D68559 >> >> Reported-by: Evgenii Shatokhin <e.shatokhin@yadro.com> >> Closes: https://lore.kernel.org/linux-riscv/7e7c7914-445d-426d-89a0-59a9199c45b1@yadro.com/ >> Acked-by: Nathan Chancellor <nathan@kernel.org> >> Signed-off-by: Andy Chiu <andy.chiu@sifive.com> > > Fixes tag? As far as I understand it, Ftrace for RISC-V has had this problem since support for FTRACE_WITH_REGS was added. FTRACE_WITH_ARGS inherited it. So, it should probably be as follows: Fixes: aea4c671fb98 ("riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support") It is more of a workaround rather than a fix though, because it is still undecided where the problem is, in the kernel or in LLVM/clang. That discussion went nowhere, unfortunately, so it is better to use a workaround and move on, IMO. > > Reviewed-by: Björn Töpel <bjorn@rivosinc.com> > Regards, Evgenii
diff --git a/arch/riscv/include/asm/ftrace.h b/arch/riscv/include/asm/ftrace.h index 2cddd79ff21b..4ca7ce7f34d7 100644 --- a/arch/riscv/include/asm/ftrace.h +++ b/arch/riscv/include/asm/ftrace.h @@ -143,6 +143,13 @@ struct ftrace_regs { unsigned long a5; unsigned long a6; unsigned long a7; +#ifdef CONFIG_CC_IS_CLANG + unsigned long t2; + unsigned long t3; + unsigned long t4; + unsigned long t5; + unsigned long t6; +#endif }; }; }; diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c index e94180ba432f..59789dfb2d5d 100644 --- a/arch/riscv/kernel/asm-offsets.c +++ b/arch/riscv/kernel/asm-offsets.c @@ -504,6 +504,13 @@ void asm_offsets(void) DEFINE(FREGS_SP, offsetof(struct ftrace_regs, sp)); DEFINE(FREGS_S0, offsetof(struct ftrace_regs, s0)); DEFINE(FREGS_T1, offsetof(struct ftrace_regs, t1)); +#ifdef CONFIG_CC_IS_CLANG + DEFINE(FREGS_T2, offsetof(struct ftrace_regs, t2)); + DEFINE(FREGS_T3, offsetof(struct ftrace_regs, t3)); + DEFINE(FREGS_T4, offsetof(struct ftrace_regs, t4)); + DEFINE(FREGS_T5, offsetof(struct ftrace_regs, t5)); + DEFINE(FREGS_T6, offsetof(struct ftrace_regs, t6)); +#endif DEFINE(FREGS_A0, offsetof(struct ftrace_regs, a0)); DEFINE(FREGS_A1, offsetof(struct ftrace_regs, a1)); DEFINE(FREGS_A2, offsetof(struct ftrace_regs, a2)); diff --git a/arch/riscv/kernel/mcount-dyn.S b/arch/riscv/kernel/mcount-dyn.S index 745dd4c4a69c..e988bd26b28b 100644 --- a/arch/riscv/kernel/mcount-dyn.S +++ b/arch/riscv/kernel/mcount-dyn.S @@ -96,7 +96,13 @@ REG_S x8, FREGS_S0(sp) #endif REG_S x6, FREGS_T1(sp) - +#ifdef CONFIG_CC_IS_CLANG + REG_S x7, FREGS_T2(sp) + REG_S x28, FREGS_T3(sp) + REG_S x29, FREGS_T4(sp) + REG_S x30, FREGS_T5(sp) + REG_S x31, FREGS_T6(sp) +#endif // save the arguments REG_S x10, FREGS_A0(sp) REG_S x11, FREGS_A1(sp) @@ -115,7 +121,13 @@ REG_L x8, FREGS_S0(sp) #endif REG_L x6, FREGS_T1(sp) - +#ifdef CONFIG_CC_IS_CLANG + REG_L x7, FREGS_T2(sp) + REG_L x28, FREGS_T3(sp) + REG_L x29, FREGS_T4(sp) + REG_L x30, FREGS_T5(sp) + REG_L x31, FREGS_T6(sp) +#endif // restore the arguments REG_L x10, FREGS_A0(sp) REG_L x11, FREGS_A1(sp)