From patchwork Fri Oct 4 16:28:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: JC Kuo X-Patchwork-Id: 11175041 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7C421112B for ; Fri, 4 Oct 2019 16:30:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5ABB4222C8 for ; Fri, 4 Oct 2019 16:30:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="F2bPtDir" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731147AbfJDQaD (ORCPT ); Fri, 4 Oct 2019 12:30:03 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:14612 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726978AbfJDQ3N (ORCPT ); Fri, 4 Oct 2019 12:29:13 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 04 Oct 2019 09:29:13 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 04 Oct 2019 09:29:12 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 04 Oct 2019 09:29:12 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 4 Oct 2019 16:29:12 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Fri, 4 Oct 2019 16:29:12 +0000 Received: from jckuo-lt.nvidia.com (Not Verified[10.19.101.223]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Fri, 04 Oct 2019 09:29:12 -0700 From: JC Kuo To: , , CC: , , , , , , JC Kuo Subject: [PATCH v3 0/7] add Tegra194 XUSB host and pad controller support Date: Sat, 5 Oct 2019 00:28:59 +0800 Message-ID: <20191004162906.4818-1-jckuo@nvidia.com> X-Mailer: git-send-email 2.17.1 X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1570206553; bh=prAoC2jXEEciuUkvcJ1IVyBjgWVH3m3veacPBoIaLpw=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: X-NVConfidentiality:MIME-Version:Content-Type; b=F2bPtDirhoSE8dcOf6l02VgYGUGwuSW3rr8cz11GeZ7AcM2cMDtZnEVwruTDX/hvn SThq9D/PwkUW5Foy/dp3C4L8ynWjEd8aqK3oRoCuUortv6ToH1Wd9HAjm1J4Hvjo3J 4wK6l/uF4vEG06ohCAttkbFrvJh88bvnOjD0lKh/u4Onl+jlE++PRykCKd0Sgqy4Sf Q4rYX53Aln3x1hYTW+B0N5KidOvdYPSQXicrVqPoQB5zJ9IHgvbOW7YTQB5u8CIxZn EhLIPS0C/aSYwpvdYlo0twBNieVVSF7M7pM2LVqksvh+0i8ViUeXpC6YxeE4uCUcP3 4236EZJQYDr9Q== Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Hi, This series introduces support for Tegra194 XUSB host and pad controller. Tegra194 XUSB host and pad controller are highly similar to the controllers found on Tegra186. Therefore, it's possible to resue xhci-tegra.c and xusb-tegra186.c for Tegra194. Changelog: v3: add change log to cover latter v2: xhci: tegra: Parameterize mailbox register addresses - no change usb: host: xhci-tegra: Add Tegra194 XHCI support - no change phy: tegra: xusb: Protect Tegra186 soc with config - new patch to protect Tegra186 soc data with config phy: tegra: xusb: Add Tegra194 support - removed unnecessary #if/#endif pairs - introduce new soc->supports_gen2 flag which indicate whether or not a soc supports USB 3.1 Gen 2 speed dt-bindings: phy: tegra: Add Tegra194 support - fix a typo arm64: tegra: Add XUSB and pad controller on Tegra194 - renamed xhci@3610000 with usb@3610000 - moved padctl@3520000 and usb@3610000 inside /cbb - cleaned up "clocks" property of usb@3610000 node - added blanks lines to visually separate blocks arm64: tegra: Enable XUSB host in P2972-0000 board - use capitalization of regulator names - fix gpio property of VDD_5V_SATA regulator JC Kuo (7): xhci: tegra: Parameterize mailbox register addresses usb: host: xhci-tegra: Add Tegra194 XHCI support phy: tegra: xusb: Protect Tegra186 soc with config phy: tegra: xusb: Add Tegra194 support dt-bindings: phy: tegra: Add Tegra194 support arm64: tegra: Add XUSB and pad controller on Tegra194 arm64: tegra: Enable XUSB host in P2972-0000 board .../phy/nvidia,tegra124-xusb-padctl.txt | 16 ++ .../arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 36 ++++- .../boot/dts/nvidia/tegra194-p2972-0000.dts | 62 ++++++++ arch/arm64/boot/dts/nvidia/tegra194.dtsi | 139 +++++++++++++++++ drivers/phy/tegra/Makefile | 1 + drivers/phy/tegra/xusb-tegra186.c | 144 +++++++++++++----- drivers/phy/tegra/xusb.c | 7 + drivers/phy/tegra/xusb.h | 6 + drivers/usb/host/xhci-tegra.c | 88 +++++++++-- 9 files changed, 448 insertions(+), 51 deletions(-)