From patchwork Mon Jan 25 09:38:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 12048071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4572C433E0 for ; Tue, 26 Jan 2021 19:36:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7F09122A84 for ; Tue, 26 Jan 2021 19:36:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729502AbhAZFkZ (ORCPT ); Tue, 26 Jan 2021 00:40:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726939AbhAYJja (ORCPT ); Mon, 25 Jan 2021 04:39:30 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3BCD1C061353 for ; Mon, 25 Jan 2021 01:38:29 -0800 (PST) Received: from dude02.hi.pengutronix.de ([2001:67c:670:100:1d::28]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l3yKJ-000618-Op; Mon, 25 Jan 2021 10:38:27 +0100 Received: from sha by dude02.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1l3yKI-00019W-Ts; Mon, 25 Jan 2021 10:38:26 +0100 From: Sascha Hauer To: linux-usb@vger.kernel.org Cc: Minas Harutyunyan , devicetree@vger.kernel.org, kernel@pengutronix.de, Sascha Hauer Subject: [PATCH v2 0/2] usb: dwc2: Use clk bulk API for supporting multiple clocks Date: Mon, 25 Jan 2021 10:38:23 +0100 Message-Id: <20210125093825.4292-1-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::28 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-usb@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Currently the dwc2 driver only supports a single clock. I have a board here which has a dwc2 controller with a somewhat special clock routing to the phy. Both the dwc2 controller and the ULPI phy get their phy clock from a SI5351 clock generator. This clock generator has multiple clock outputs which each is modelled as a separate clk in Linux. Unfortunately the clock to the phy and the clock to the dwc2 core are on two different output pins of the SI5351, so we have two clocks which must be enabled. The phy is driven by the usb-nop-xceiver driver which supports a single clock. My first approach was to add support for a second clock to that driver, but technically the other clock is connected to the dwc2 core, so instead I added support for a second clock to the dwc2 driver. This can easily be archieved with the clk bulk API as done in this series. Changes since v1: - Add minItems to dec2 clock/clock-names property to avoid dt_binding_check warning Sascha Hauer (2): dt-bindings: usb: dwc2: Add support for additional clock usb: dwc2: use clk bulk API for supporting additional clocks .../devicetree/bindings/usb/dwc2.yaml | 5 ++++- drivers/usb/dwc2/core.h | 2 ++ drivers/usb/dwc2/platform.c | 18 ++++++++---------- 3 files changed, 14 insertions(+), 11 deletions(-)