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Tue, 14 Feb 2023 15:47:10 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT037.mail.protection.outlook.com (10.13.172.122) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6086.24 via Frontend Transport; Tue, 14 Feb 2023 15:47:10 +0000 Received: from AUS-LX-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Tue, 14 Feb 2023 09:47:09 -0600 From: Mario Limonciello To: , CC: , , , , Mario Limonciello , Subject: [PATCH 0/2] Fix problems fetching TBT3 DROM from AMD USB4 routers Date: Tue, 14 Feb 2023 09:46:44 -0600 Message-ID: <20230214154647.874-1-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT037:EE_|CH0PR12MB5282:EE_ X-MS-Office365-Filtering-Correlation-Id: c676d7b2-f9ea-4c6c-2640-08db0ea2bc01 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Feb 2023 15:47:10.3958 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c676d7b2-f9ea-4c6c-2640-08db0ea2bc01 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT037.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5282 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org TBT3 devices when connected to an AMD USB4 router occasionally fail to properly respond to requests for the DROM via bit banging. Depending upon which part of the request failed will impact the severity. A number of workarounds have been put in place to let the driver handle the failed requests: e87491a9fd4e3 ("thunderbolt: Retry DROM reads for more failure scenarios") a283de3ec646f ("thunderbolt: Do not resume routers if UID is not set") 6915812bbd109 ("thunderbolt: Do not make DROM read success compulsory") Still even with these changes the failures do make it through. In comparing other CM implementations, they all access the DROM directly from the NVM. To avoid triggering this issue, try to get the DROM directly from the NVM in Linux as well before resorting to bitbanging. Mario Limonciello (2): thunderbolt: Read DROM directly from NVM before trying bit banging thunderbolt: use `tb_eeprom_get_drom_offset` to discover DROM offset drivers/thunderbolt/eeprom.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)