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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF0002636A.mail.protection.outlook.com (10.167.241.135) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7091.26 via Frontend Transport; Tue, 12 Dec 2023 14:01:18 +0000 Received: from jatayu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Tue, 12 Dec 2023 08:01:14 -0600 From: Sanath S To: , , , , , , CC: Sanath S Subject: [PATCH 0/2] Add support for downstream port reset(DPR) Date: Tue, 12 Dec 2023 19:30:45 +0530 Message-ID: <20231212140047.2021496-1-Sanath.S@amd.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636A:EE_|DM6PR12MB4185:EE_ X-MS-Office365-Filtering-Correlation-Id: 58e0e8a4-fc56-48f8-433b-08dbfb1ad3b4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Dec 2023 14:01:18.8990 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 58e0e8a4-fc56-48f8-433b-08dbfb1ad3b4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4185 Tunnels created by boot firmware results in incorrect PCI resource allocation, which results in failure of extending daisy chain. This series aligns with windows behaviour of performing a teardown of tunnels and resetting the downstream ports using DPR during the init sequence. Sanath S (2): thunderbolt: Introduce tb_switch_reset_ports(), tb_port_reset() and usb4_port_reset() thunderbolt: Teardown tunnels and reset downstream ports created by boot firmware drivers/thunderbolt/switch.c | 31 ++++++++ drivers/thunderbolt/tb.c | 137 ++-------------------------------- drivers/thunderbolt/tb.h | 2 + drivers/thunderbolt/tb_regs.h | 1 + drivers/thunderbolt/usb4.c | 39 ++++++++++ 5 files changed, 80 insertions(+), 130 deletions(-)