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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbc3a47sm13027694f8f.73.2024.11.26.01.21.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 01:21:05 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de, geert+renesas@glider.be, magnus.damm@gmail.com, gregkh@linuxfoundation.org, yoshihiro.shimoda.uh@renesas.com, christophe.jaillet@wanadoo.fr Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-usb@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v2 00/15] Add initial USB support for the Renesas RZ/G3S SoC Date: Tue, 26 Nov 2024 11:20:35 +0200 Message-Id: <20241126092050.1825607-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Hi, Series adds initial USB support for the Renesas RZ/G3S SoC. Series is split as follows: - patches 01-05/15 - add SYSC driver support; this is necessary for USB PHY as the USB PHY driver need to touch a register in the SYSC address space, in the initialization phase - patch 06/15 - updates the USBHS documentation for RZ/G3S - patches 07-10/15 - updates the USB PHY support to handle the SYSC USB PWRRDY signal. Along with it a fix for the DT bindings and one for the PHY driver were added; fixes are RZ/G3S USB related - patch 11/15 - document the USB PHY Ctrl support - patches 12-15/15 - add device tree support Merge strategy, if any: - patches 01-05/15,12-14/15 can go through Renesas tree - patch 06/14 can go though USB tree - patches 07-10/14 can go through PHY tree - patch 11/15 can go though reset controller tree Thank you, Claudiu Beznea Changes in v2: - dropped v1 patches already applied - added fixes patches (07/14 and 09/14) - dropped the approach of handling the USB PWRRDY though a reset controller driver and introduced the signal concept for the SYSC driver; because of this, most of the work done in v1 was dropped - per patch changes are listed in individual patches, if any Christophe JAILLET (1): phy: renesas: rcar-gen3-usb2: Fix an error handling path in rcar_gen3_phy_usb2_probe() Claudiu Beznea (14): dt-bindings: soc: renesas: renesas,rzg2l-sysc: Add #renesas,sysc-signal-cells soc: renesas: Add SYSC driver for Renesas RZ family soc: renesas: rz-sysc: Enable SYSC driver for RZ/G3S soc: renesas: rz-sysc: Add SoC detection support soc: renesas: rz-sysc: Move RZ/G3S SoC detection to the SYSC driver dt-bindings: usb: renesas,usbhs: Document RZ/G3S SoC dt-bindings: phy: renesas,usb2-phy: Mark resets as required for RZ/G3S dt-bindings: phy: renesas,usb2-phy: Add renesas,sysc-signal phy: renesas: rcar-gen3-usb2: Add support for PWRRDY dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support arm64: dts: renesas: Add #renesas,sysc-signal-cells to system controller node arm64: dts: renesas: r9a08g045: Enable the system controller arm64: dts: renesas: r9a08g045: Add USB support arm64: dts: renesas: rzg3s-smarc: Enable USB support .../bindings/phy/renesas,usb2-phy.yaml | 26 +- .../reset/renesas,rzg2l-usbphy-ctrl.yaml | 1 + .../soc/renesas/renesas,rzg2l-sysc.yaml | 23 +- .../bindings/usb/renesas,usbhs.yaml | 2 + arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 3 +- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 3 +- arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 3 +- arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 123 +++++- arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 57 +++ drivers/phy/renesas/phy-rcar-gen3-usb2.c | 77 +++- drivers/soc/renesas/Kconfig | 8 + drivers/soc/renesas/Makefile | 2 + drivers/soc/renesas/r9a08g045-sysc.c | 43 +++ drivers/soc/renesas/renesas-soc.c | 12 - drivers/soc/renesas/rz-sysc.c | 350 ++++++++++++++++++ drivers/soc/renesas/rz-sysc.h | 70 ++++ 16 files changed, 778 insertions(+), 25 deletions(-) create mode 100644 drivers/soc/renesas/r9a08g045-sysc.c create mode 100644 drivers/soc/renesas/rz-sysc.c create mode 100644 drivers/soc/renesas/rz-sysc.h