From patchwork Tue Jul 3 19:57:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Laszczak X-Patchwork-Id: 10505093 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8DE2860225 for ; Tue, 3 Jul 2018 19:59:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7BC2528C00 for ; Tue, 3 Jul 2018 19:59:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6DDFD28C27; Tue, 3 Jul 2018 19:59:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B05AF28C00 for ; Tue, 3 Jul 2018 19:59:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753367AbeGCT74 (ORCPT ); Tue, 3 Jul 2018 15:59:56 -0400 Received: from mail-sn1nam02on0063.outbound.protection.outlook.com ([104.47.36.63]:18259 "EHLO NAM02-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753109AbeGCT6h (ORCPT ); Tue, 3 Jul 2018 15:58:37 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cadence.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=hBXuPmpVEyj/ZvVUhsd/bKbvZi/g3TYsODv1xuLNo7s=; b=eWAkbUIrt5vtnttYsdgbFzlKErW14BbNDXeRrMpvMLOibPHYs+vxBmJLTBztDfZi2XXrXBYeS6SnpuL2VJtu/bJbEpPLEbMOlkMNNU6DH7/erRcfuDSzOHvmpFr6rmUg7W5saLlm3f9lHs325T4BzInNPoAz1z8881ysIbF+Sa8= Received: from BYAPR07CA0028.namprd07.prod.outlook.com (2603:10b6:a02:bc::41) by DM2PR0701MB1342.namprd07.prod.outlook.com (2a01:111:e400:5119::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.906.26; Tue, 3 Jul 2018 19:58:34 +0000 Received: from CO1NAM05FT018.eop-nam05.prod.protection.outlook.com (2a01:111:f400:7e50::207) by BYAPR07CA0028.outlook.office365.com (2603:10b6:a02:bc::41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.906.20 via Frontend Transport; Tue, 3 Jul 2018 19:58:33 +0000 Authentication-Results: spf=softfail (sender IP is 199.43.4.28) smtp.mailfrom=cadence.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=fail action=none header.from=cadence.com; Received-SPF: SoftFail (protection.outlook.com: domain of transitioning cadence.com discourages use of 199.43.4.28 as permitted sender) Received: from rmmaillnx1.cadence.com (199.43.4.28) by CO1NAM05FT018.mail.protection.outlook.com (10.152.96.125) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.20.930.2 via Frontend Transport; Tue, 3 Jul 2018 19:58:32 +0000 Received: from maileu3.global.cadence.com (maileu3.cadence.com [10.160.88.99]) by rmmaillnx1.cadence.com (8.14.4/8.14.4) with ESMTP id w63JwMsB006991 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=FAIL); Tue, 3 Jul 2018 15:58:31 -0400 X-CrossPremisesHeadersFilteredBySendConnector: maileu3.global.cadence.com Received: from maileu3.global.cadence.com (10.160.88.99) by maileu3.global.cadence.com (10.160.88.99) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Tue, 3 Jul 2018 21:58:42 +0200 Received: from lvlogina.cadence.com (10.165.176.102) by maileu3.global.cadence.com (10.160.88.99) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Tue, 3 Jul 2018 21:58:42 +0200 Received: from lvlogina.cadence.com (localhost.localdomain [127.0.0.1]) by lvlogina.cadence.com (8.14.4/8.14.4) with ESMTP id w63JwPio012369; Tue, 3 Jul 2018 20:58:25 +0100 Received: (from pawell@localhost) by lvlogina.cadence.com (8.14.4/8.14.4/Submit) id w63JwP6C012367; Tue, 3 Jul 2018 20:58:25 +0100 From: Pawel Laszczak To: Greg Kroah-Hartman , , Felipe Balbi CC: , , Subject: [PATCH 13/15] Introduce Cadence USBSSP DRD Driver - added usbssp-pci-of-wrap.c file This file implements wrapper between PCI adn platform driver. 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+ struct pci_dev *otg; + struct pci_dev *hg_dev; + struct resource res[5]; +}; + +struct usbssp_pci usbssp; + +/** + * usbssp_pci_probe - Probe function for Cadence USB wrapper driver + * @pdev: platform device object + * @id: pci device id + * + * Returns 0 on success otherwise negative errno + */ +static int usbssp_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *id) +{ + int rv = 0; + struct platform_device *usbssp_plat; + + if (pdev->devfn > 1) + return 0; + + if (!id) + return -EINVAL; + + if (pcim_enable_device(pdev) < 0) { + dev_err(&pdev->dev, "failed to enable PCI device\n"); + return -ENOMEM; + } + + pci_set_master(pdev); + + /* + * function 0: device(BAR_2) + host(BAR_0) + * function 1: otg(BAR_0))cdns3_remove_roles + */ + if (pdev->devfn == 0 || pdev->devfn == 1) { + if (!usbssp.plat_cdns) { + usbssp_plat = platform_device_alloc("usbssp-dev", + PLATFORM_DEVID_AUTO); + memset(usbssp.res, 0x00, sizeof(struct resource) * + ARRAY_SIZE(usbssp.res)); + usbssp.plat_cdns = usbssp_plat; + + if (!usbssp_plat->dev.dma_mask) { + dma_coerce_mask_and_coherent(&usbssp_plat->dev, + DMA_BIT_MASK(32)); + } + } + } else + return -EINVAL; + + /* for GADGET device function number is 0 */ + if (pdev->devfn == 0) { + usbssp.hg_dev = pdev; + //device resource + usbssp.res[0].start = pci_resource_start(pdev, 2); + usbssp.res[0].end = pci_resource_end(pdev, 2); + usbssp.res[0].name = "usbssp-dev-regs"; + usbssp.res[0].flags = IORESOURCE_MEM; + + /* Interrupt resource*/ + usbssp.res[1].start = pdev->irq; + usbssp.res[1].name = "usbssp-dev-irq"; + usbssp.res[1].flags = IORESOURCE_IRQ; + } else if (pdev->devfn == 1) { + usbssp.otg = pdev; + //OTG + usbssp.res[2].start = pci_resource_start(pdev, 0); + usbssp.res[2].end = pci_resource_end(pdev, 0); + usbssp.res[2].name = "otg"; + usbssp.res[2].flags = IORESOURCE_MEM; + + usbssp.res[3].start = pci_resource_start(pdev, 1); + usbssp.res[3].end = pci_resource_end(pdev, 1); + usbssp.res[3].name = "debug1"; + usbssp.res[3].flags = IORESOURCE_MEM; + + usbssp.res[4].start = pci_resource_start(pdev, 2); + usbssp.res[4].end = pci_resource_end(pdev, 2); + usbssp.res[4].name = "debug2"; + usbssp.res[4].flags = IORESOURCE_MEM; + } else { + return -EIO; + } + + if (usbssp.otg && usbssp.hg_dev) { + + struct pci_dev *pci_hg = usbssp.hg_dev; + struct platform_device *plat_dev = usbssp.plat_cdns; + + rv = platform_device_add_resources(plat_dev, usbssp.res, + ARRAY_SIZE(usbssp.res)); + if (rv) { + dev_err(&plat_dev->dev, + "couldn't add resources to cdns device\n"); + return rv; + } + + rv = platform_device_add(plat_dev); + + if (rv) { + dev_err(&pci_hg->dev, + "failed to register cdns device\n"); + platform_device_put(plat_dev); + return rv; + } + } + + pci_set_drvdata(pdev, &usbssp); + + return rv; +} + +void usbssp_pci_remove(struct pci_dev *pdev) +{ + struct usbssp_pci *usbssp = pci_get_drvdata(pdev); + + if (pdev->devfn > 1) + return; + + if (pdev->devfn == 1) + usbssp->otg = NULL; + else if (pdev->devfn == 0) + usbssp->hg_dev = NULL; + + if (!usbssp->hg_dev && !usbssp->otg) + platform_device_unregister(usbssp->plat_cdns); +} + +#if CONFIG_PM || CONFIG_PM_SLEEP +static int usbssp_generic_suspend(struct usbssp_pci *usbssp, int param) +{ + /*TODO*/ + return -ENOSYS; +} + +static int usbssp_generic_resume(struct usbssp_pci *usbssp, int param) +{ + /*TODO*/ + return -ENOSYS; +} + +#endif /*CONFIG_PM || CONFIG_PM_SLEEP*/ + +#ifdef CONFIG_PM +static int usbssp_runtime_suspend(struct device *dev) +{ + struct usbssp_pci *usbssp = dev_get_drvdata(dev); + + return usbssp_generic_suspend(usbssp, 0); +} + +static int usbssp_runtime_resume(struct device *dev) +{ + struct usbssp_pci *usbssp = dev_get_drvdata(dev); + + return usbssp_generic_resume(usbssp, 0); +} +#endif /* CONFIG_PM */ + +#ifdef CONFIG_PM_SLEEP +static int usbssp_pci_suspend(struct device *dev) +{ + struct usbssp_pci *usbssp = dev_get_drvdata(dev); + + return usbssp_generic_suspend(usbssp, 0); +} + +static int usbssp_pci_resume(struct device *dev) +{ + struct usbssp_pci *usbssp = dev_get_drvdata(dev); + + return usbssp_generic_resume(usbssp, 0); +} +#endif /* CONFIG_PM_SLEEP */ + +static const struct dev_pm_ops usbssp_pci_dev_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(usbssp_runtime_suspend, usbssp_runtime_resume) + SET_RUNTIME_PM_OPS(usbssp_pci_suspend, usbssp_pci_resume, + NULL) +}; + +#define PCI_VENDOR_ID_CDZ 0x17CD +static const struct pci_device_id usbssp_pci_ids[] = { + {PCI_VDEVICE(CDZ, 0x0100), }, + { /* terminate list */} +}; + +MODULE_DEVICE_TABLE(pci, usbssp_pci_ids); + +static struct pci_driver usbssp_pci_driver = { + .name = "usbssp-pci", + .id_table = &usbssp_pci_ids[0], + .probe = usbssp_pci_probe, + .remove = usbssp_pci_remove, + .driver = { + .pm = &usbssp_pci_dev_pm_ops, + } +}; + +MODULE_AUTHOR("Pawel Laszczak "); +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("Cadence USBSSP PCI Glue Layer"); + +module_pci_driver(usbssp_pci_driver); + +