diff mbox series

[v4,1/2] i2c: buses: add i2c bus driver for NVIDIA GPU

Message ID 1535665130-25111-1-git-send-email-ajayg@nvidia.com (mailing list archive)
State New, archived
Headers show
Series [v4,1/2] i2c: buses: add i2c bus driver for NVIDIA GPU | expand

Commit Message

Ajay Gupta Aug. 30, 2018, 9:38 p.m. UTC
Latest NVIDIA GPU card has USB Type-C interface. There is a
Type-C controller which can be accessed over I2C.

This driver adds I2C bus driver to communicate with Type-C controller.
I2C client driver will be part of USB Type-C UCSI driver.

Signed-off-by: Ajay Gupta <ajayg@nvidia.com>
---
Changes from v1 -> v2
	None
Changes from v2 -> v3
	Fixed review comments from Andy and Thierry
	Rename i2c-gpu.c -> i2c-nvidia-gpu.c
Changes from v3 -> v4
	Fixed review comments from Andy

 Documentation/i2c/busses/i2c-nvidia-gpu |  18 ++
 MAINTAINERS                             |   7 +
 drivers/i2c/busses/Kconfig              |   9 +
 drivers/i2c/busses/Makefile             |   1 +
 drivers/i2c/busses/i2c-nvidia-gpu.c     | 398 ++++++++++++++++++++++++++++++++
 5 files changed, 433 insertions(+)
 create mode 100644 Documentation/i2c/busses/i2c-nvidia-gpu
 create mode 100644 drivers/i2c/busses/i2c-nvidia-gpu.c

Comments

Andy Shevchenko Aug. 31, 2018, 6:39 a.m. UTC | #1
On Fri, Aug 31, 2018 at 12:41 AM Ajay Gupta <ajayg@nvidia.com> wrote:
>
> Latest NVIDIA GPU card has USB Type-C interface. There is a
> Type-C controller which can be accessed over I2C.
>
> This driver adds I2C bus driver to communicate with Type-C controller.
> I2C client driver will be part of USB Type-C UCSI driver.

Thanks for an update, my comments below.

> +#include <linux/delay.h>
> +#include <linux/i2c.h>
> +#include <linux/interrupt.h>
> +#include <linux/module.h>
> +#include <linux/pci.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm.h>
> +#include <linux/pm_runtime.h>

+ blank line.

> +#include <asm/unaligned.h>

> +struct gpu_i2c_dev {
> +       struct device *dev;
> +       void __iomem *regs;
> +       struct i2c_adapter adapter;
> +       struct i2c_client *client;
> +       struct mutex mutex;     /* to sync read/write */
> +       bool do_start;
> +};

> +static int i2c_check_status(struct gpu_i2c_dev *i2cd)
> +{
> +       unsigned long target = jiffies + msecs_to_jiffies(1000);
> +       u32 val;
> +
> +       do {
> +               val = readl(i2cd->regs + I2C_MST_CNTL);

> +               if ((val & I2C_MST_CNTL_CYCLE_TRIGGER) !=
> +                               I2C_MST_CNTL_CYCLE_TRIGGER)

Part after != redundant since it's one bit.
But I'm fine with current as well.

> +                       break;
> +               if ((val & I2C_MST_CNTL_STATUS) !=
> +                               I2C_MST_CNTL_STATUS_BUS_BUSY)
> +                       break;
> +               usleep_range(1000, 2000);
> +       } while (time_is_after_jiffies(target));

> +

Redundant.

> +       if (time_is_before_jiffies(target))
> +               return -EIO;
> +
> +       val = readl(i2cd->regs + I2C_MST_CNTL);
> +       switch (val & I2C_MST_CNTL_STATUS) {
> +       case I2C_MST_CNTL_STATUS_OKAY:
> +               return 0;
> +       case I2C_MST_CNTL_STATUS_NO_ACK:
> +               return -EIO;
> +       case I2C_MST_CNTL_STATUS_TIMEOUT:
> +               return -ETIME;
> +       case I2C_MST_CNTL_STATUS_BUS_BUSY:
> +               return -EBUSY;
> +       default:

> +               break;

return 0; ?

> +       }

> +       return 0;

See above.

> +}

> +static int i2c_write(struct gpu_i2c_dev *i2cd, u8 data)
> +{
> +       u32 val;
> +
> +       writel(data, i2cd->regs + I2C_MST_DATA);
> +
> +       val = I2C_MST_CNTL_CMD_WRITE | (1 << I2C_MST_CNTL_BURST_SIZE_SHIFT) |
> +               I2C_MST_CNTL_GEN_NACK;

> +       val &= ~(I2C_MST_CNTL_GEN_START | I2C_MST_CNTL_GEN_STOP
> +               | I2C_MST_CNTL_GEN_RAB);

"|" should be on previous line to follow common style in this module.

> +       writel(val, i2cd->regs + I2C_MST_CNTL);
> +
> +       return i2c_check_status(i2cd);
> +}
> +
> +static int gpu_i2c_master_xfer(struct i2c_adapter *adap,
> +                              struct i2c_msg *msgs, int num)
> +{
> +       struct gpu_i2c_dev *i2cd = i2c_get_adapdata(adap);
> +       struct device *dev = i2cd->dev;
> +       int status;
> +       int i, j;

> +stop:
> +       status = i2c_stop(i2cd);
> +       if (status < 0)
> +               dev_err(dev, "i2c_stop error %x", status);
> +unlock:
> +       mutex_unlock(&i2cd->mutex);

> +       return i;

Shouldn't it return status in case of error?

> +}

> +/*
> + * This driver is for the Nvidia GPU cards with USB Type-C interface.
> + * We want to identify the cards using vendor ID and class code.
> + * Currently there is no class code defined for UCSI device over PCI
> + * so using UNKNOWN.
> + */

So, I didn't see how it *guarantees* no collision with other devices
of the same class...

> +#define PCI_CLASS_SERIAL_UNKNOWN       0x0c80
> +static const struct pci_device_id gpu_i2c_ids[] = {

> +       { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
> +               PCI_CLASS_SERIAL_UNKNOWN << 8, 0xffffff00},

...for now, I would suggest to be more stricted, i.e.

{ PCI_VDEVICE(NVIDIA, 0x1ad9) },

Whenever the class appears it can be added later on.

> +       { }
> +};
> +MODULE_DEVICE_TABLE(pci, gpu_i2c_ids);
> +

> +static int gpu_i2c_probe(struct pci_dev *dev, const struct pci_device_id *id)

Use pdev instead of dev to distinguish struct device from struct
pci_dev type in variable name.

> +static void gpu_i2c_remove(struct pci_dev *dev)

Ditto.

> +       struct gpu_i2c_dev *i2cd = pci_get_drvdata(to_pci_dev(dev));
Isn't the same as dev_get_drvdata() ?

> +       struct gpu_i2c_dev *i2cd = pci_get_drvdata(to_pci_dev(dev));

Ditto.
Ajay Gupta Aug. 31, 2018, 7:24 p.m. UTC | #2
Hi Andy,
> > Latest NVIDIA GPU card has USB Type-C interface. There is a Type-C
> > controller which can be accessed over I2C.
> >
> > This driver adds I2C bus driver to communicate with Type-C controller.
> > I2C client driver will be part of USB Type-C UCSI driver.
> 
> Thanks for an update, my comments below.
Thanks for reviewing.
 
> > +#include <linux/delay.h>
> > +#include <linux/i2c.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/module.h>
> > +#include <linux/pci.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm.h>
> > +#include <linux/pm_runtime.h>
> 
> + blank line.
Ok. 
I could not find kernel documentation which requires this blank line.
Can you please point me to it?
 
> > +#include <asm/unaligned.h>
> 
> > +struct gpu_i2c_dev {
> > +       struct device *dev;
> > +       void __iomem *regs;
> > +       struct i2c_adapter adapter;
> > +       struct i2c_client *client;
> > +       struct mutex mutex;     /* to sync read/write */
> > +       bool do_start;
> > +};
> 
> > +static int i2c_check_status(struct gpu_i2c_dev *i2cd) {
> > +       unsigned long target = jiffies + msecs_to_jiffies(1000);
> > +       u32 val;
> > +
> > +       do {
> > +               val = readl(i2cd->regs + I2C_MST_CNTL);
> 
> > +               if ((val & I2C_MST_CNTL_CYCLE_TRIGGER) !=
> > +                               I2C_MST_CNTL_CYCLE_TRIGGER)
> 
> Part after != redundant since it's one bit.
> But I'm fine with current as well.
Ok, will fix.
> 
> > +                       break;
> > +               if ((val & I2C_MST_CNTL_STATUS) !=
> > +                               I2C_MST_CNTL_STATUS_BUS_BUSY)
> > +                       break;
> > +               usleep_range(1000, 2000);
> > +       } while (time_is_after_jiffies(target));
> 
> > +
> 
> Redundant.
Ok, I will remove it but I didn't understand why its redundant?
I thought adding extra line would be more readable.
 
> > +       if (time_is_before_jiffies(target))
> > +               return -EIO;
> > +
> > +       val = readl(i2cd->regs + I2C_MST_CNTL);
> > +       switch (val & I2C_MST_CNTL_STATUS) {
> > +       case I2C_MST_CNTL_STATUS_OKAY:
> > +               return 0;
> > +       case I2C_MST_CNTL_STATUS_NO_ACK:
> > +               return -EIO;
> > +       case I2C_MST_CNTL_STATUS_TIMEOUT:
> > +               return -ETIME;
> > +       case I2C_MST_CNTL_STATUS_BUS_BUSY:
> > +               return -EBUSY;
> > +       default:
> 
> > +               break;
> 
> return 0; ?
Ok, will fix.
> 
> > +       }
> 
> > +       return 0;
> 
> See above.
Ok
> 
> > +}
> 
> > +static int i2c_write(struct gpu_i2c_dev *i2cd, u8 data) {
> > +       u32 val;
> > +
> > +       writel(data, i2cd->regs + I2C_MST_DATA);
> > +
> > +       val = I2C_MST_CNTL_CMD_WRITE | (1 <<
> I2C_MST_CNTL_BURST_SIZE_SHIFT) |
> > +               I2C_MST_CNTL_GEN_NACK;
> 
> > +       val &= ~(I2C_MST_CNTL_GEN_START | I2C_MST_CNTL_GEN_STOP
> > +               | I2C_MST_CNTL_GEN_RAB);
> 
> "|" should be on previous line to follow common style in this module.
The "|" here is to clear the bit together.  [val &= ~(X | Y | Z)]
Style in this module is still followed. Please see first line which does "|" to val.

> > +       writel(val, i2cd->regs + I2C_MST_CNTL);
> > +
> > +       return i2c_check_status(i2cd); }
> > +
> > +static int gpu_i2c_master_xfer(struct i2c_adapter *adap,
> > +                              struct i2c_msg *msgs, int num) {
> > +       struct gpu_i2c_dev *i2cd = i2c_get_adapdata(adap);
> > +       struct device *dev = i2cd->dev;
> > +       int status;
> > +       int i, j;
> 
> > +stop:
> > +       status = i2c_stop(i2cd);
> > +       if (status < 0)
> > +               dev_err(dev, "i2c_stop error %x", status);
> > +unlock:
> > +       mutex_unlock(&i2cd->mutex);
> 
> > +       return i;
> 
> Shouldn't it return status in case of error?
Thanks, will fix.
 
> > +}
> 
> > +/*
> > + * This driver is for the Nvidia GPU cards with USB Type-C interface.
> > + * We want to identify the cards using vendor ID and class code.
> > + * Currently there is no class code defined for UCSI device over PCI
> > + * so using UNKNOWN.
> > + */
> 
> So, I didn't see how it *guarantees* no collision with other devices of the
> same class...

I checked and there is no other NVIDIA cards with UNKNOWN class code. 
Moreover, even if the driver gets loaded for a wrong card then eventually
i2c_read() (initiated from UCSI driver) will timeout or UCSI commands will
timeout. I think this is safe enough for now. We will update the class code
when UCSI gets a PCI class code.

We don't want to add dependency of adding product id for any new card
which requires this driver.
 
> > +#define PCI_CLASS_SERIAL_UNKNOWN       0x0c80
> > +static const struct pci_device_id gpu_i2c_ids[] = {
> 
> > +       { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
> > +               PCI_CLASS_SERIAL_UNKNOWN << 8, 0xffffff00},
> 
> ...for now, I would suggest to be more stricted, i.e.
> 
> { PCI_VDEVICE(NVIDIA, 0x1ad9) },
> 
> Whenever the class appears it can be added later on.
See above.
> 
> > +       { }
> > +};
> > +MODULE_DEVICE_TABLE(pci, gpu_i2c_ids);
> > +
> 
> > +static int gpu_i2c_probe(struct pci_dev *dev, const struct
> > +pci_device_id *id)
> 
> Use pdev instead of dev to distinguish struct device from struct pci_dev type
> in variable name.
ok
> 
> > +static void gpu_i2c_remove(struct pci_dev *dev)
> 
> Ditto.
> 
> > +       struct gpu_i2c_dev *i2cd = pci_get_drvdata(to_pci_dev(dev));
> Isn't the same as dev_get_drvdata() ?
ok
> 
> > +       struct gpu_i2c_dev *i2cd = pci_get_drvdata(to_pci_dev(dev));
> 
> Ditto.
Ok

Thanks
Ajay
--
nvpublic
--
> 
> --
> With Best Regards,
> Andy Shevchenko
Ajay Gupta Aug. 31, 2018, 8:01 p.m. UTC | #3
Hi Andy

> > > Latest NVIDIA GPU card has USB Type-C interface. There is a Type-C
> > > controller which can be accessed over I2C.
> > > +       val &= ~(I2C_MST_CNTL_GEN_START | I2C_MST_CNTL_GEN_STOP
> > > +               | I2C_MST_CNTL_GEN_RAB);
> >
> > "|" should be on previous line to follow common style in this module.
> The "|" here is to clear the bit together.  [val &= ~(X | Y | Z)] Style in this
> module is still followed. Please see first line which does "|" to val.
Ok, I got your point of putting "|" on line above and will fix it.

Thanks
Ajay

--
nvpublic
--
> 
> > > +       writel(val, i2cd->regs + I2C_MST_CNTL);
> > > +
> > > +       return i2c_check_status(i2cd); }
> > > +
> > > +static int gpu_i2c_master_xfer(struct i2c_adapter *adap,
> > > +                              struct i2c_msg *msgs, int num) {
> > > +       struct gpu_i2c_dev *i2cd = i2c_get_adapdata(adap);
> > > +       struct device *dev = i2cd->dev;
> > > +       int status;
> > > +       int i, j;
> >
diff mbox series

Patch

diff --git a/Documentation/i2c/busses/i2c-nvidia-gpu b/Documentation/i2c/busses/i2c-nvidia-gpu
new file mode 100644
index 0000000..31884d2
--- /dev/null
+++ b/Documentation/i2c/busses/i2c-nvidia-gpu
@@ -0,0 +1,18 @@ 
+Kernel driver i2c-nvidia-gpu
+
+Datasheet: not publicly available.
+
+Authors:
+	Ajay Gupta <ajayg@nvidia.com>
+
+Description
+-----------
+
+i2c-nvidia-gpu is a driver for I2C controller included in NVIDIA Turing
+and later GPUs and it is used to communicate with Type-C controller on GPUs.
+
+If your 'lspci -v' listing shows something like the following,
+
+01:00.3 Serial bus controller [0c80]: NVIDIA Corporation Device 1ad9 (rev a1)
+
+then this driver should support the I2C controller of your GPU.
diff --git a/MAINTAINERS b/MAINTAINERS
index 9ad052a..2d1c5a1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6797,6 +6797,13 @@  L:	linux-acpi@vger.kernel.org
 S:	Maintained
 F:	drivers/i2c/i2c-core-acpi.c
 
+I2C CONTROLLER DRIVER FOR NVIDIA GPU
+M:	Ajay Gupta <ajayg@nvidia.com>
+L:	linux-i2c@vger.kernel.org
+S:	Maintained
+F:	Documentation/i2c/busses/i2c-nvidia-gpu
+F:	drivers/i2c/busses/i2c-nvidia-gpu.c
+
 I2C MUXES
 M:	Peter Rosin <peda@axentia.se>
 L:	linux-i2c@vger.kernel.org
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 451d4ae..eed827b 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -224,6 +224,15 @@  config I2C_NFORCE2_S4985
 	  This driver can also be built as a module.  If so, the module
 	  will be called i2c-nforce2-s4985.
 
+config I2C_NVIDIA_GPU
+	tristate "NVIDIA GPU I2C controller"
+	depends on PCI
+	help
+	  If you say yes to this option, support will be included for the
+	  NVIDIA GPU I2C controller which is used to communicate with the GPU's
+	  Type-C controller. This driver can also be built as a module called
+	  i2c-nvidia-gpu.
+
 config I2C_SIS5595
 	tristate "SiS 5595"
 	depends on PCI
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 18b26af..d499813 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -140,5 +140,6 @@  obj-$(CONFIG_I2C_SIBYTE)	+= i2c-sibyte.o
 obj-$(CONFIG_I2C_XGENE_SLIMPRO) += i2c-xgene-slimpro.o
 obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
 obj-$(CONFIG_I2C_FSI)		+= i2c-fsi.o
+obj-$(CONFIG_I2C_NVIDIA_GPU)	+= i2c-nvidia-gpu.o
 
 ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG
diff --git a/drivers/i2c/busses/i2c-nvidia-gpu.c b/drivers/i2c/busses/i2c-nvidia-gpu.c
new file mode 100644
index 0000000..51b8712
--- /dev/null
+++ b/drivers/i2c/busses/i2c-nvidia-gpu.c
@@ -0,0 +1,398 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nvidia GPU I2C controller Driver
+ *
+ * Copyright (C) 2018 NVIDIA Corporation. All rights reserved.
+ * Author: Ajay Gupta <ajayg@nvidia.com>
+ */
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/platform_device.h>
+#include <linux/pm.h>
+#include <linux/pm_runtime.h>
+#include <asm/unaligned.h>
+
+/* I2C definitions */
+#define I2C_MST_CNTL				0x00
+#define I2C_MST_CNTL_GEN_START			BIT(0)
+#define I2C_MST_CNTL_GEN_STOP			BIT(1)
+#define I2C_MST_CNTL_CMD_NONE			(0 << 2)
+#define I2C_MST_CNTL_CMD_READ			(1 << 2)
+#define I2C_MST_CNTL_CMD_WRITE			(2 << 2)
+#define I2C_MST_CNTL_GEN_RAB			BIT(4)
+#define I2C_MST_CNTL_BURST_SIZE_SHIFT		6
+#define I2C_MST_CNTL_GEN_NACK			BIT(28)
+#define I2C_MST_CNTL_STATUS			GENMASK(30, 29)
+#define I2C_MST_CNTL_STATUS_OKAY		(0 << 29)
+#define I2C_MST_CNTL_STATUS_NO_ACK		(1 << 29)
+#define I2C_MST_CNTL_STATUS_TIMEOUT		(2 << 29)
+#define I2C_MST_CNTL_STATUS_BUS_BUSY		(3 << 29)
+#define I2C_MST_CNTL_CYCLE_TRIGGER		BIT(31)
+
+#define I2C_MST_ADDR				0x04
+#define I2C_MST_ADDR_DAB			0
+
+#define I2C_MST_I2C0_TIMING				0x08
+#define I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ		0x10e
+#define I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT		16
+#define I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX		255
+#define I2C_MST_I2C0_TIMING_TIMEOUT_CHECK		BIT(24)
+
+#define I2C_MST_DATA					0x0c
+
+#define I2C_MST_HYBRID_PADCTL				0x20
+#define I2C_MST_HYBRID_PADCTL_MODE_I2C			BIT(0)
+#define I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV		BIT(14)
+#define I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV		BIT(15)
+
+struct gpu_i2c_dev {
+	struct device *dev;
+	void __iomem *regs;
+	struct i2c_adapter adapter;
+	struct i2c_client *client;
+	struct mutex mutex;	/* to sync read/write */
+	bool do_start;
+};
+
+static void enable_i2c_bus(struct gpu_i2c_dev *i2cd)
+{
+	u32 val;
+
+	/* enable I2C */
+	val = readl(i2cd->regs + I2C_MST_HYBRID_PADCTL);
+	val |= I2C_MST_HYBRID_PADCTL_MODE_I2C |
+		I2C_MST_HYBRID_PADCTL_I2C_SCL_INPUT_RCV |
+		I2C_MST_HYBRID_PADCTL_I2C_SDA_INPUT_RCV;
+	writel(val, i2cd->regs + I2C_MST_HYBRID_PADCTL);
+
+	/* enable 100KHZ mode */
+	val = I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ;
+	val |= (I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT_MAX
+	    << I2C_MST_I2C0_TIMING_TIMEOUT_CLK_CNT);
+	val |= I2C_MST_I2C0_TIMING_TIMEOUT_CHECK;
+	writel(val, i2cd->regs + I2C_MST_I2C0_TIMING);
+}
+
+static int i2c_check_status(struct gpu_i2c_dev *i2cd)
+{
+	unsigned long target = jiffies + msecs_to_jiffies(1000);
+	u32 val;
+
+	do {
+		val = readl(i2cd->regs + I2C_MST_CNTL);
+		if ((val & I2C_MST_CNTL_CYCLE_TRIGGER) !=
+				I2C_MST_CNTL_CYCLE_TRIGGER)
+			break;
+		if ((val & I2C_MST_CNTL_STATUS) !=
+				I2C_MST_CNTL_STATUS_BUS_BUSY)
+			break;
+		usleep_range(1000, 2000);
+	} while (time_is_after_jiffies(target));
+
+	if (time_is_before_jiffies(target))
+		return -EIO;
+
+	val = readl(i2cd->regs + I2C_MST_CNTL);
+	switch (val & I2C_MST_CNTL_STATUS) {
+	case I2C_MST_CNTL_STATUS_OKAY:
+		return 0;
+	case I2C_MST_CNTL_STATUS_NO_ACK:
+		return -EIO;
+	case I2C_MST_CNTL_STATUS_TIMEOUT:
+		return -ETIME;
+	case I2C_MST_CNTL_STATUS_BUS_BUSY:
+		return -EBUSY;
+	default:
+		break;
+	}
+	return 0;
+}
+
+static int i2c_read(struct gpu_i2c_dev *i2cd, u8 *data, u16 len)
+{
+	int status;
+	u32 val;
+
+	val = I2C_MST_CNTL_GEN_START | I2C_MST_CNTL_GEN_STOP |
+		I2C_MST_CNTL_CMD_READ | (len << I2C_MST_CNTL_BURST_SIZE_SHIFT) |
+		I2C_MST_CNTL_CYCLE_TRIGGER | I2C_MST_CNTL_GEN_NACK;
+	val &= ~I2C_MST_CNTL_GEN_RAB;
+	writel(val, i2cd->regs + I2C_MST_CNTL);
+
+	status = i2c_check_status(i2cd);
+	if (status < 0)
+		return status;
+
+	val = readl(i2cd->regs + I2C_MST_DATA);
+	switch (len) {
+	case 1:
+		data[0] = val;
+		break;
+	case 2:
+		put_unaligned_be16(val, data);
+		break;
+	case 3:
+		put_unaligned_be16(val >> 8, data);
+		data[2] = val;
+		break;
+	case 4:
+		put_unaligned_be32(val, data);
+		break;
+	default:
+		break;
+	}
+	return status;
+}
+
+static int i2c_start(struct gpu_i2c_dev *i2cd, u16 addr)
+{
+	u32 val;
+
+	val = addr << I2C_MST_ADDR_DAB;
+	writel(val, i2cd->regs + I2C_MST_ADDR);
+
+	val = I2C_MST_CNTL_GEN_START | I2C_MST_CNTL_CMD_NONE |
+		I2C_MST_CNTL_GEN_NACK;
+	val &= ~(I2C_MST_CNTL_GEN_STOP | I2C_MST_CNTL_GEN_RAB);
+	writel(val, i2cd->regs + I2C_MST_CNTL);
+
+	return i2c_check_status(i2cd);
+}
+
+static int i2c_stop(struct gpu_i2c_dev *i2cd)
+{
+	u32 val;
+
+	val = I2C_MST_CNTL_GEN_STOP | I2C_MST_CNTL_CMD_NONE |
+		I2C_MST_CNTL_GEN_NACK;
+	val &= ~(I2C_MST_CNTL_GEN_START | I2C_MST_CNTL_GEN_RAB);
+	writel(val, i2cd->regs + I2C_MST_CNTL);
+
+	return i2c_check_status(i2cd);
+}
+
+static int i2c_write(struct gpu_i2c_dev *i2cd, u8 data)
+{
+	u32 val;
+
+	writel(data, i2cd->regs + I2C_MST_DATA);
+
+	val = I2C_MST_CNTL_CMD_WRITE | (1 << I2C_MST_CNTL_BURST_SIZE_SHIFT) |
+		I2C_MST_CNTL_GEN_NACK;
+	val &= ~(I2C_MST_CNTL_GEN_START | I2C_MST_CNTL_GEN_STOP
+		| I2C_MST_CNTL_GEN_RAB);
+	writel(val, i2cd->regs + I2C_MST_CNTL);
+
+	return i2c_check_status(i2cd);
+}
+
+static int gpu_i2c_master_xfer(struct i2c_adapter *adap,
+			       struct i2c_msg *msgs, int num)
+{
+	struct gpu_i2c_dev *i2cd = i2c_get_adapdata(adap);
+	struct device *dev = i2cd->dev;
+	int status;
+	int i, j;
+
+	mutex_lock(&i2cd->mutex);
+	for (i = 0; i < num; i++) {
+		if (msgs[i].flags & I2C_M_RD) {
+			status = i2c_read(i2cd, msgs[i].buf, msgs[i].len);
+			if (status < 0) {
+				dev_err(dev, "i2c_read error %x", status);
+				break;
+			}
+			i2cd->do_start = true;
+		} else if (msgs[i].flags & I2C_M_STOP) {
+			status = i2c_stop(i2cd);
+			if (status < 0) {
+				dev_err(dev, "i2c_stop error %x", status);
+				goto unlock;
+			}
+			i2cd->do_start = true;
+		} else {
+			if (i2cd->do_start) {
+				status = i2c_start(i2cd, msgs[i].addr);
+				if (status < 0) {
+					dev_err(dev, "i2c_start error %x",
+						status);
+					goto unlock;
+				}
+				status = i2c_write(i2cd, msgs[i].addr << 1);
+				if (status < 0) {
+					dev_err(dev, "i2c_write error %x",
+						status);
+					goto stop;
+				}
+				i2cd->do_start = false;
+			}
+			for (j = 0; j < msgs[i].len; j++) {
+				status = i2c_write(i2cd, *(msgs[i].buf + j));
+				if (status < 0) {
+					dev_err(dev, "i2c_write error %x",
+						status);
+					goto stop;
+				}
+			}
+		}
+	}
+	goto unlock;
+stop:
+	status = i2c_stop(i2cd);
+	if (status < 0)
+		dev_err(dev, "i2c_stop error %x", status);
+unlock:
+	mutex_unlock(&i2cd->mutex);
+	return i;
+}
+
+static u32 gpu_i2c_functionality(struct i2c_adapter *adap)
+{
+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm gpu_i2c_algorithm = {
+	.master_xfer	= gpu_i2c_master_xfer,
+	.functionality	= gpu_i2c_functionality,
+};
+
+/*
+ * This driver is for the Nvidia GPU cards with USB Type-C interface.
+ * We want to identify the cards using vendor ID and class code.
+ * Currently there is no class code defined for UCSI device over PCI
+ * so using UNKNOWN.
+ */
+#define PCI_CLASS_SERIAL_UNKNOWN	0x0c80
+static const struct pci_device_id gpu_i2c_ids[] = {
+	{ PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+		PCI_CLASS_SERIAL_UNKNOWN << 8, 0xffffff00},
+	{ }
+};
+MODULE_DEVICE_TABLE(pci, gpu_i2c_ids);
+
+static int gpu_populate_client(struct gpu_i2c_dev *i2cd, int irq)
+{
+	static struct i2c_board_info gpu_ccgx_ucsi = {
+		I2C_BOARD_INFO("ccgx-ucsi", 0x8),
+	};
+
+	gpu_ccgx_ucsi.irq = irq;
+	i2cd->client = i2c_new_device(&i2cd->adapter, &gpu_ccgx_ucsi);
+	if (!i2cd->client) {
+		dev_err(i2cd->dev, "i2c_new_device failed\n");
+		return -ENODEV;
+	}
+	return 0;
+}
+
+static int gpu_i2c_probe(struct pci_dev *dev, const struct pci_device_id *id)
+{
+	struct gpu_i2c_dev *i2cd;
+	int status;
+
+	i2cd = devm_kzalloc(&dev->dev, sizeof(struct gpu_i2c_dev), GFP_KERNEL);
+	if (!i2cd)
+		return -ENOMEM;
+
+	i2cd->dev = &dev->dev;
+	pci_set_drvdata(dev, i2cd);
+
+	status = pcim_enable_device(dev);
+	if (status < 0) {
+		dev_err(&dev->dev, "pcim_enable_device failed - %d\n", status);
+		return status;
+	}
+
+	pci_set_master(dev);
+
+	i2cd->regs = pcim_iomap(dev, 0, 0);
+	if (!i2cd->regs) {
+		dev_err(&dev->dev, "pcim_iomap failed\n");
+		return -ENOMEM;
+	}
+
+	status = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_MSI);
+	if (status < 0) {
+		dev_err(&dev->dev, "pci_alloc_irq_vectors err - %d\n", status);
+		return status;
+	}
+
+	i2cd->do_start = true;
+	mutex_init(&i2cd->mutex);
+	enable_i2c_bus(i2cd);
+
+	i2c_set_adapdata(&i2cd->adapter, i2cd);
+	i2cd->adapter.owner = THIS_MODULE;
+	strlcpy(i2cd->adapter.name, "NVIDIA GPU I2C adapter",
+		sizeof(i2cd->adapter.name));
+	i2cd->adapter.algo = &gpu_i2c_algorithm;
+	i2cd->adapter.dev.parent = &dev->dev;
+	status = i2c_add_adapter(&i2cd->adapter);
+	if (status < 0) {
+		dev_err(&dev->dev, "i2c_add_adapter failed - %d\n", status);
+		goto del_adapter;
+	}
+
+	status = gpu_populate_client(i2cd, dev->irq);
+	if (status < 0) {
+		dev_err(&dev->dev, "gpu_populate_client failed - %d\n", status);
+		goto del_adapter;
+	}
+
+	return 0;
+
+del_adapter:
+	i2c_del_adapter(&i2cd->adapter);
+	pci_free_irq_vectors(dev);
+	return status;
+}
+
+static void gpu_i2c_remove(struct pci_dev *dev)
+{
+	struct gpu_i2c_dev *i2cd = pci_get_drvdata(dev);
+
+	i2c_del_adapter(&i2cd->adapter);
+	pci_free_irq_vectors(dev);
+}
+
+static int gpu_i2c_resume(struct device *dev)
+{
+	struct gpu_i2c_dev *i2cd = pci_get_drvdata(to_pci_dev(dev));
+
+	enable_i2c_bus(i2cd);
+	return 0;
+}
+
+static int gpu_i2c_idle(struct device *dev)
+{
+	struct gpu_i2c_dev *i2cd = pci_get_drvdata(to_pci_dev(dev));
+
+	if (!mutex_trylock(&i2cd->mutex)) {
+		dev_info(dev, "-EBUSY\n");
+		return -EBUSY;
+	}
+	mutex_unlock(&i2cd->mutex);
+
+	return 0;
+}
+
+UNIVERSAL_DEV_PM_OPS(gpu_i2c_driver_pm, NULL, gpu_i2c_resume, gpu_i2c_idle);
+
+static struct pci_driver gpu_i2c_driver = {
+	.name		= "nvidia-gpu",
+	.id_table	= gpu_i2c_ids,
+	.probe		= gpu_i2c_probe,
+	.remove		= gpu_i2c_remove,
+	.driver		= {
+		.pm	= &gpu_i2c_driver_pm,
+	},
+};
+
+module_pci_driver(gpu_i2c_driver);
+
+MODULE_AUTHOR("Ajay Gupta <ajayg@nvidia.com>");
+MODULE_DESCRIPTION("Nvidia GPU I2C controller Driver");
+MODULE_LICENSE("GPL v2");