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Sat, 15 Sep 2018 07:30:30 -0700 Received: from [127.0.0.1] (helo=localhost) by xsj-pvapsmtp01 with smtp (Exim 4.63) (envelope-from ) id 1g1Bab-0004qu-1x; Sat, 15 Sep 2018 07:30:25 -0700 Received: from xsj-pvapsmtp01 (mailhub.xilinx.com [149.199.38.66]) by xsj-smtp-dlp2.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id w8FEUHfI031449; Sat, 15 Sep 2018 07:30:17 -0700 Received: from [172.23.64.8] (helo=xhdvnc108.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1g1BaS-0004kT-Qe; Sat, 15 Sep 2018 07:30:17 -0700 Received: by xhdvnc108.xilinx.com (Postfix, from userid 15427) id 08C9F604AD; Sat, 15 Sep 2018 20:00:16 +0530 (IST) From: Anurag Kumar Vulisha To: , CC: , , , , , Anurag Kumar Vulisha Subject: [PATCH v5 1/8] usb: dwc3: Correct the logic for checking TRB full in __dwc3_prepare_one_trb() Date: Sat, 15 Sep 2018 19:59:54 +0530 Message-ID: <1537021801-23896-2-git-send-email-anurag.kumar.vulisha@xilinx.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1537021801-23896-1-git-send-email-anurag.kumar.vulisha@xilinx.com> References: <1537021801-23896-1-git-send-email-anurag.kumar.vulisha@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(376002)(136003)(346002)(396003)(39860400002)(2980300002)(438002)(199004)(189003)(336012)(54906003)(90966002)(8936002)(478600001)(81166006)(186003)(6266002)(36756003)(2906002)(50226002)(81156014)(39060400002)(26005)(51416003)(11346002)(107886003)(106002)(110136005)(48376002)(50466002)(426003)(446003)(4326008)(126002)(76176011)(486006)(16586007)(15760500003)(5660300001)(316002)(2616005)(356003)(6666003)(36386004)(42186006)(47776003)(305945005)(8676002)(63266004)(103686004)(476003)(106466001)(52956003)(107986001);DIR:OUT;SFP:1101;SCL:1;SRVR:BL0PR02MB4465;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1;MX:1; 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In the present code, __dwc3_prepare_one_trb() is called with a TRB which needs to be prepared for transfer. This __dwc3_prepare_one_trb() calls dwc3_calc_trbs_left() to determine total available TRBs and set IOC bit if the total available TRBs are zero. Since the present working TRB (which is passed as an argument to __dwc3_prepare_one_trb() ) doesn't yet have the HWO bit set before calling dwc3_calc_trbs_left(), there are chances that dwc3_calc_trbs_left() wrongly calculates this present working TRB as free(since the HWO bit is not yet set) and returns the total available TRBs as greater than zero (including the present working TRB). This could be a problem. This patch corrects the above mentioned problem in __dwc3_prepare_one_trb() by increementing the dep->trb_enqueue at the last (after preparing the TRB) instead of increementing at the start and setting the IOC bit only if the total available TRBs returned by dwc3_calc_trbs_left() is 1 . Since we are increementing the dep->trb_enqueue at the last, the present working TRB is also considered as available by dwc3_calc_trbs_left() and non zero value is returned . So, according to the modified logic, when the total available TRBs is equal to 1 that means the total available TRBs in the pool are 0. Signed-off-by: Anurag Kumar Vulisha Reviewed-by: Thinh Nguyen --- Changes in v5: 1. None Changes in v4: 1. Corrected the commit message as suggested by "Thinh Nguyen" Changes in v3: 1. Corrected the logic for setting HWO bit as suggested by "Thinh Nguyen" Changes in v2: 1. Changed the commit message --- drivers/usb/dwc3/gadget.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 032ea7d..8a1622b 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -911,8 +911,6 @@ static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb, struct usb_gadget *gadget = &dwc->gadget; enum usb_device_speed speed = gadget->speed; - dwc3_ep_inc_enq(dep); - trb->size = DWC3_TRB_SIZE_LENGTH(length); trb->bpl = lower_32_bits(dma); trb->bph = upper_32_bits(dma); @@ -991,7 +989,7 @@ static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb, } if ((!no_interrupt && !chain) || - (dwc3_calc_trbs_left(dep) == 0)) + (dwc3_calc_trbs_left(dep) == 1)) trb->ctrl |= DWC3_TRB_CTRL_IOC; if (chain) @@ -1002,6 +1000,8 @@ static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb, trb->ctrl |= DWC3_TRB_CTRL_HWO; + dwc3_ep_inc_enq(dep); + trace_dwc3_prepare_trb(dep, trb); }