From patchwork Thu Sep 20 16:13:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathias Nyman X-Patchwork-Id: 10607991 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2E15115A6 for ; Thu, 20 Sep 2018 16:11:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 747432E04D for ; Thu, 20 Sep 2018 16:11:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 73B382E089; Thu, 20 Sep 2018 16:11:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EFB762DF48 for ; Thu, 20 Sep 2018 16:11:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732112AbeITVzL (ORCPT ); Thu, 20 Sep 2018 17:55:11 -0400 Received: from mga01.intel.com ([192.55.52.88]:60871 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731992AbeITVzK (ORCPT ); Thu, 20 Sep 2018 17:55:10 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Sep 2018 09:10:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,399,1531810800"; d="scan'208";a="91827614" Received: from mattu-haswell.fi.intel.com ([10.237.72.164]) by fmsmga001.fm.intel.com with ESMTP; 20 Sep 2018 09:10:48 -0700 From: Mathias Nyman To: Cc: , Thierry Reding , Mathias Nyman Subject: [PATCH v2 09/10] usb: xhci: tegra: Firmware header is little endian Date: Thu, 20 Sep 2018 19:13:39 +0300 Message-Id: <1537460020-1009-10-git-send-email-mathias.nyman@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537460020-1009-1-git-send-email-mathias.nyman@linux.intel.com> References: <1537460020-1009-1-git-send-email-mathias.nyman@linux.intel.com> Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding The XUSB firmware header is in little endian byte order, so make the fields __le32 and __le16 instead of u32 and u16 to avoid warnings from sparse when the fields are used with the endian-aware __le32_to_cpu() and __le16_to_cpu() accessors, respectively. Signed-off-by: Thierry Reding Signed-off-by: Mathias Nyman --- drivers/usb/host/xhci-tegra.c | 52 +++++++++++++++++++++---------------------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 4b463e5..4ee510a 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -107,35 +107,35 @@ #define IMEM_BLOCK_SIZE 256 struct tegra_xusb_fw_header { - u32 boot_loadaddr_in_imem; - u32 boot_codedfi_offset; - u32 boot_codetag; - u32 boot_codesize; - u32 phys_memaddr; - u16 reqphys_memsize; - u16 alloc_phys_memsize; - u32 rodata_img_offset; - u32 rodata_section_start; - u32 rodata_section_end; - u32 main_fnaddr; - u32 fwimg_cksum; - u32 fwimg_created_time; - u32 imem_resident_start; - u32 imem_resident_end; - u32 idirect_start; - u32 idirect_end; - u32 l2_imem_start; - u32 l2_imem_end; - u32 version_id; + __le32 boot_loadaddr_in_imem; + __le32 boot_codedfi_offset; + __le32 boot_codetag; + __le32 boot_codesize; + __le32 phys_memaddr; + __le16 reqphys_memsize; + __le16 alloc_phys_memsize; + __le32 rodata_img_offset; + __le32 rodata_section_start; + __le32 rodata_section_end; + __le32 main_fnaddr; + __le32 fwimg_cksum; + __le32 fwimg_created_time; + __le32 imem_resident_start; + __le32 imem_resident_end; + __le32 idirect_start; + __le32 idirect_end; + __le32 l2_imem_start; + __le32 l2_imem_end; + __le32 version_id; u8 init_ddirect; u8 reserved[3]; - u32 phys_addr_log_buffer; - u32 total_log_entries; - u32 dequeue_ptr; - u32 dummy_var[2]; - u32 fwimg_len; + __le32 phys_addr_log_buffer; + __le32 total_log_entries; + __le32 dequeue_ptr; + __le32 dummy_var[2]; + __le32 fwimg_len; u8 magic[8]; - u32 ss_low_power_entry_timeout; + __le32 ss_low_power_entry_timeout; u8 num_hsic_port; u8 padding[139]; /* Pad to 256 bytes */ };