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Tue, 22 Sep 2020 10:54:14 +0000 From: Li Jun To: robh+dt@kernel.org, shawnguo@kernel.org, balbi@kernel.org, mathias.nyman@intel.com Cc: gregkh@linuxfoundation.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, Anson.Huang@nxp.com, jun.li@nxp.com, aisheng.dong@nxp.com, peng.fan@nxp.com, fugang.duan@nxp.com, qiangqing.zhang@nxp.com, horia.geanta@nxp.com, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/6] dt-bindings: usb: xhci: add property to disable xhci 64bit support Date: Tue, 22 Sep 2020 18:46:47 +0800 Message-Id: <1600771612-30727-2-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1600771612-30727-1-git-send-email-jun.li@nxp.com> References: <1600771612-30727-1-git-send-email-jun.li@nxp.com> X-ClientProxiedBy: SG2PR0401CA0017.apcprd04.prod.outlook.com (2603:1096:3:1::27) To VE1PR04MB6528.eurprd04.prod.outlook.com (2603:10a6:803:127::18) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from 10.192.242.69 (119.31.174.66) by SG2PR0401CA0017.apcprd04.prod.outlook.com (2603:1096:3:1::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3391.13 via Frontend Transport; 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Signed-off-by: Li Jun --- Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt index 0c5cff8..26446fb 100644 --- a/Documentation/devicetree/bindings/usb/usb-xhci.txt +++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt @@ -28,6 +28,9 @@ Optional properties: - quirk-broken-port-ped: set if the controller has broken port disable mechanism - imod-interval-ns: default interrupt moderation interval is 5000ns - phys : see usb-hcd.yaml in the current directory + - xhci-64bit-support-disable: set if the AC64 bit (bit 0) of HCCPARAMS1 is + set to be 1, but the controller actually can't handle 64-bit address + due to SoC integration. additionally the properties from usb-hcd.yaml (in the current directory) are supported.