| Message ID | 1627880576-22391-1-git-send-email-sanm@codeaurora.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 6493367f8031b1e5cf0a217d6520c0d79a5d6659 |
| Headers | show |
| Series | arm64: dts: qcom: sc7280: Add interconnect properties for USB | expand |
On Mon, Aug 02, 2021 at 10:32:56AM +0530, Sandeep Maheswaram wrote: > Add interconnect properties in USB DT nodes for sc7280. > > Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Quoting Sandeep Maheswaram (2021-08-01 22:02:56) > Add interconnect properties in USB DT nodes for sc7280. > > Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 5764c5b..1558f99 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -1288,6 +1288,10 @@ resets = <&gcc GCC_USB30_SEC_BCR>; + interconnects = <&aggre1_noc MASTER_USB2 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_USB2 0>; + interconnect-names = "usb-ddr", "apps-usb"; + usb_2_dwc3: usb@8c00000 { compatible = "snps,dwc3"; reg = <0 0x08c00000 0 0xe000>; @@ -1361,6 +1365,10 @@ resets = <&gcc GCC_USB30_PRIM_BCR>; + interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_USB3_0 0>; + interconnect-names = "usb-ddr", "apps-usb"; + usb_1_dwc3: usb@a600000 { compatible = "snps,dwc3"; reg = <0 0x0a600000 0 0xe000>;
Add interconnect properties in USB DT nodes for sc7280. Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)