| Message ID | 1703575199-23638-1-git-send-email-william.wu@rock-chips.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | ca2dc35e555e7043de585f4e46123d8fbd2b5a21 |
| Headers | show |
| Series | usb: dwc2: Disable clock gating feature on Rockchip SoCs | expand |
Hi, On 12/26/23 11:19, William Wu wrote: > The DWC2 IP on the Rockchip SoCs doesn't support clock gating. > When a clock gating is enabled, system hangs. > > Signed-off-by: William Wu <william.wu@rock-chips.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> > --- > drivers/usb/dwc2/params.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c > index fb03162..eb677c3 100644 > --- a/drivers/usb/dwc2/params.c > +++ b/drivers/usb/dwc2/params.c > @@ -130,6 +130,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) > p->lpm_clock_gating = false; > p->besl = false; > p->hird_threshold_en = false; > + p->no_clock_gating = true; > } > > static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index fb03162..eb677c3 100644 --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c @@ -130,6 +130,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) p->lpm_clock_gating = false; p->besl = false; p->hird_threshold_en = false; + p->no_clock_gating = true; } static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
The DWC2 IP on the Rockchip SoCs doesn't support clock gating. When a clock gating is enabled, system hangs. Signed-off-by: William Wu <william.wu@rock-chips.com> --- drivers/usb/dwc2/params.c | 1 + 1 file changed, 1 insertion(+)