From patchwork Thu Jun 7 10:38:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 10451615 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 850B760233 for ; Thu, 7 Jun 2018 10:38:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7647C29B2E for ; Thu, 7 Jun 2018 10:38:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6B26D29B7A; Thu, 7 Jun 2018 10:38:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E00D529B2E for ; Thu, 7 Jun 2018 10:38:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753283AbeFGKiv (ORCPT ); Thu, 7 Jun 2018 06:38:51 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:45478 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753292AbeFGKis (ORCPT ); Thu, 7 Jun 2018 06:38:48 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C1F9980125F1; Thu, 7 Jun 2018 10:38:47 +0000 (UTC) Received: from shalem.localdomain.com (unknown [10.36.118.41]) by smtp.corp.redhat.com (Postfix) with ESMTP id 19FE36B5BC; Thu, 7 Jun 2018 10:38:46 +0000 (UTC) From: Hans de Goede To: Felipe Balbi , Greg Kroah-Hartman Cc: Hans de Goede , linux-usb@vger.kernel.org Subject: [PATCH 2/3] usb: dwc3: pci: Enable ULPI Refclk on platforms where the firmware doesnot Date: Thu, 7 Jun 2018 12:38:44 +0200 Message-Id: <20180607103845.13515-2-hdegoede@redhat.com> In-Reply-To: <20180607103845.13515-1-hdegoede@redhat.com> References: <20180607103845.13515-1-hdegoede@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Thu, 07 Jun 2018 10:38:47 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Thu, 07 Jun 2018 10:38:47 +0000 (UTC) for IP:'10.11.54.5' DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'hdegoede@redhat.com' RCPT:'' Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On some Bay Trail (BYT) systems the firmware does not enable the ULPI Refclk. This commit adds a helper which checks and if necessary enabled the Refclk and calls this helper for BYT machines. Signed-off-by: Hans de Goede --- drivers/usb/dwc3/dwc3-pci.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c index 34b84d3bc7cf..65bc110388f3 100644 --- a/drivers/usb/dwc3/dwc3-pci.c +++ b/drivers/usb/dwc3/dwc3-pci.c @@ -42,6 +42,9 @@ #define PCI_INTEL_BXT_STATE_D0 0 #define PCI_INTEL_BXT_STATE_D3 3 +#define GP_RWREG1 0xa0 +#define GP_RWREG1_ULPI_REFCLK_DISABLE (1 << 17) + /** * struct dwc3_pci - Driver private structure * @dwc3: child dwc3 platform_device @@ -78,6 +81,34 @@ static struct gpiod_lookup_table platform_bytcr_gpios = { }, }; +static void dwc3_pci_enable_ulpi_refclock(struct pci_dev *pci) +{ + void __iomem *reg; + struct resource res; + struct device *dev = &pci->dev; + u32 value; + + res.start = pci_resource_start(pci, 1); + res.end = pci_resource_end(pci, 1); + res.name = "dwc_usb3_bar1"; + res.flags = IORESOURCE_MEM; + + reg = devm_ioremap_resource(dev, &res); + if (IS_ERR(reg)) { + dev_err(dev, "cannot check GP_RWREG1 to assert ulpi refclock\n"); + return; + } + + value = readl(reg + GP_RWREG1); + if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE)) + return; /* ULPI refclk already enabled */ + + dev_warn(dev, "ULPI refclock is disabled from the BIOS, enabling it\n"); + value &= ~GP_RWREG1_ULPI_REFCLK_DISABLE; + writel(value, reg + GP_RWREG1); + msleep(100); +} + static int dwc3_pci_quirks(struct dwc3_pci *dwc) { struct platform_device *dwc3 = dwc->dwc3; @@ -134,6 +165,9 @@ static int dwc3_pci_quirks(struct dwc3_pci *dwc) struct gpio_desc *gpio; const char *vendor; + /* On BYT the FW does not always enable the refclock */ + dwc3_pci_enable_ulpi_refclock(pdev); + ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, acpi_dwc3_byt_gpios); if (ret)