| Message ID | 20190412224149.106971-4-dianders@chromium.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | usb: dwc2: Another attempt handling rk3288's remote wake quirk | expand |
On Fri, Apr 12, 2019 at 03:41:48PM -0700, Douglas Anderson wrote: > Let's hook up the resets to the three USB PHYs on rk3288 as per the > bindings. This is in preparation for a future patch that will set the > "snps,reset-phy-on-wake" on the host port. > > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- > > arch/arm/boot/dts/rk3288.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi > index 2e604f0afa98..92e0600595f8 100644 > --- a/arch/arm/boot/dts/rk3288.dtsi > +++ b/arch/arm/boot/dts/rk3288.dtsi > @@ -905,6 +905,8 @@ > clocks = <&cru SCLK_OTGPHY0>; > clock-names = "phyclk"; > #clock-cells = <0>; > + resets = <&cru SRST_USBOTG_PHY>; > + reset-names = "phy-reset"; > }; > > usbphy1: usb-phy@334 { > @@ -913,6 +915,8 @@ > clocks = <&cru SCLK_OTGPHY1>; > clock-names = "phyclk"; > #clock-cells = <0>; > + resets = <&cru SRST_USBHOST0_PHY>; > + reset-names = "phy-reset"; > }; > > usbphy2: usb-phy@348 { > @@ -921,6 +925,8 @@ > clocks = <&cru SCLK_OTGPHY2>; > clock-names = "phyclk"; > #clock-cells = <0>; > + resets = <&cru SRST_USBHOST1_PHY>; > + reset-names = "phy-reset"; > }; > }; > }; Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 2e604f0afa98..92e0600595f8 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -905,6 +905,8 @@ clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBOTG_PHY>; + reset-names = "phy-reset"; }; usbphy1: usb-phy@334 { @@ -913,6 +915,8 @@ clocks = <&cru SCLK_OTGPHY1>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBHOST0_PHY>; + reset-names = "phy-reset"; }; usbphy2: usb-phy@348 { @@ -921,6 +925,8 @@ clocks = <&cru SCLK_OTGPHY2>; clock-names = "phyclk"; #clock-cells = <0>; + resets = <&cru SRST_USBHOST1_PHY>; + reset-names = "phy-reset"; }; }; };
Let's hook up the resets to the three USB PHYs on rk3288 as per the bindings. This is in preparation for a future patch that will set the "snps,reset-phy-on-wake" on the host port. Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm/boot/dts/rk3288.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)