| Message ID | 20190506234631.113226-9-chris.brandt@renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | usb: Add host and device support for RZ/A2 | expand |
On Mon, May 06, 2019 at 06:46:29PM -0500, Chris Brandt wrote: > Add EHCI and OHCI host support for RZ/A2. > > Signed-off-by: Chris Brandt <chris.brandt@renesas.com> > --- > arch/arm/boot/dts/r7s9210.dtsi | 64 ++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 64 insertions(+) > > diff --git a/arch/arm/boot/dts/r7s9210.dtsi b/arch/arm/boot/dts/r7s9210.dtsi > index 2eaa5eeba509..1a992e6197c3 100644 > --- a/arch/arm/boot/dts/r7s9210.dtsi > +++ b/arch/arm/boot/dts/r7s9210.dtsi > @@ -322,6 +322,70 @@ > status = "disabled"; > }; > > + ohci0: usbhcd@e8218000 { > + compatible = "generic-ohci"; > + reg = <0xe8218000 0x100>; > + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 61>; > + phys = <&usb2_phy0>; > + phy-names = "usb"; > + power-domains = <&cpg>; > + status = "disabled"; > + }; > + > + ehci0: usbhcd@e8218100 { > + compatible = "generic-ehci"; > + reg = <0xe8218100 0x100>; > + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 61>; > + phys = <&usb2_phy0>; > + phy-names = "usb"; > + power-domains = <&cpg>; > + status = "disabled"; > + }; > + > + usb2_phy0: usb-phy@e8218200 { > + compatible = "renesas,usb2-phy-r7s9210","renesas,rcar-gen3-usb2-phy"; Hi Chris, please add a space after ','. Likewise below. Otherwise this patch looks good to me. > + reg = <0xe8218200 0x10>; > + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 61>; > + power-domains = <&cpg>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > + > + ohci1: usbhcd@e821a000 { > + compatible = "generic-ohci"; > + reg = <0xe821a000 0x100>; > + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 60>; > + phys = <&usb2_phy1>; > + phy-names = "usb"; > + power-domains = <&cpg>; > + status = "disabled"; > + }; > + > + ehci1: usbhcd@e821a100 { > + compatible = "generic-ehci"; > + reg = <0xe821a100 0x100>; > + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 60>; > + phys = <&usb2_phy1>; > + phy-names = "usb"; > + power-domains = <&cpg>; > + status = "disabled"; > + }; > + > + usb2_phy1: usb-phy@e821a200 { > + compatible = "renesas,usb2-phy-r7s9210","renesas,rcar-gen3-usb2-phy"; > + reg = <0xe821a200 0x10>; > + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 60>; > + power-domains = <&cpg>; > + #phy-cells = <0>; > + status = "disabled"; > + }; > + > sdhi0: sd@e8228000 { > compatible = "renesas,sdhi-r7s9210"; > reg = <0xe8228000 0x8c0>; > -- > 2.16.1 >
diff --git a/arch/arm/boot/dts/r7s9210.dtsi b/arch/arm/boot/dts/r7s9210.dtsi index 2eaa5eeba509..1a992e6197c3 100644 --- a/arch/arm/boot/dts/r7s9210.dtsi +++ b/arch/arm/boot/dts/r7s9210.dtsi @@ -322,6 +322,70 @@ status = "disabled"; }; + ohci0: usbhcd@e8218000 { + compatible = "generic-ohci"; + reg = <0xe8218000 0x100>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 61>; + phys = <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + ehci0: usbhcd@e8218100 { + compatible = "generic-ehci"; + reg = <0xe8218100 0x100>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 61>; + phys = <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + usb2_phy0: usb-phy@e8218200 { + compatible = "renesas,usb2-phy-r7s9210","renesas,rcar-gen3-usb2-phy"; + reg = <0xe8218200 0x10>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 61>; + power-domains = <&cpg>; + #phy-cells = <0>; + status = "disabled"; + }; + + ohci1: usbhcd@e821a000 { + compatible = "generic-ohci"; + reg = <0xe821a000 0x100>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 60>; + phys = <&usb2_phy1>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + ehci1: usbhcd@e821a100 { + compatible = "generic-ehci"; + reg = <0xe821a100 0x100>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 60>; + phys = <&usb2_phy1>; + phy-names = "usb"; + power-domains = <&cpg>; + status = "disabled"; + }; + + usb2_phy1: usb-phy@e821a200 { + compatible = "renesas,usb2-phy-r7s9210","renesas,rcar-gen3-usb2-phy"; + reg = <0xe821a200 0x10>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 60>; + power-domains = <&cpg>; + #phy-cells = <0>; + status = "disabled"; + }; + sdhi0: sd@e8228000 { compatible = "renesas,sdhi-r7s9210"; reg = <0xe8228000 0x8c0>;
Add EHCI and OHCI host support for RZ/A2. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> --- arch/arm/boot/dts/r7s9210.dtsi | 64 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+)