From patchwork Fri Aug 30 08:20:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Min Guo X-Patchwork-Id: 11123255 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9DC7714DE for ; Fri, 30 Aug 2019 08:23:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 81F4222CE3 for ; Fri, 30 Aug 2019 08:23:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727901AbfH3IXA (ORCPT ); Fri, 30 Aug 2019 04:23:00 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:43431 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727328AbfH3IW7 (ORCPT ); Fri, 30 Aug 2019 04:22:59 -0400 X-UUID: bdfc3e0ee73e453e95d2c511f1eb7cff-20190830 X-UUID: bdfc3e0ee73e453e95d2c511f1eb7cff-20190830 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 92640775; Fri, 30 Aug 2019 16:22:57 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by MTKMBS31DR.mediatek.inc (172.27.6.102) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 30 Aug 2019 16:22:54 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 30 Aug 2019 16:22:53 +0800 From: To: Bin Liu , Rob Herring CC: Greg Kroah-Hartman , Mark Rutland , Matthias Brugger , Alan Stern , , , , , , , , , Min Guo Subject: [PATCH v7 2/6] arm: dts: mt2701: Add usb2 device nodes Date: Fri, 30 Aug 2019 16:20:22 +0800 Message-ID: <20190830082026.30401-3-min.guo@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190830082026.30401-1-min.guo@mediatek.com> References: <20190830082026.30401-1-min.guo@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: C9F3E78E53E28EE0CFD7294776C7F59F4B6970C89FD0F6348E87FBB9B1A8ED5E2000:8 X-MTK: N Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Min Guo Add musb nodes and usb2 phy nodes for MT2701 Signed-off-by: Min Guo --- changes in v7: 1. Change usb connector child node compatible as "gpio-usb-b-connector" changes in v6: 1. Modify usb connector child node changes in v5: 1. Add usb connector child node changes in v4: 1. no changes changes in v3: 1. no changes changes in v2: 1. Remove phy-names --- arch/arm/boot/dts/mt2701-evb.dts | 21 +++++++++++++++++++++ arch/arm/boot/dts/mt2701.dtsi | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+) diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts index 88f8fd2..05ba43c 100644 --- a/arch/arm/boot/dts/mt2701-evb.dts +++ b/arch/arm/boot/dts/mt2701-evb.dts @@ -6,6 +6,7 @@ */ /dts-v1/; +#include #include "mt2701.dtsi" / { @@ -61,6 +62,15 @@ >; default-brightness-level = <9>; }; + + usb_vbus: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 45 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &auxadc { @@ -230,3 +240,14 @@ &uart0 { status = "okay"; }; + +&usb2 { + status = "okay"; + connector{ + compatible = "gpio-usb-b-connector"; + label = "micro-USB"; + type = "micro"; + id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>; + vbus-supply = <&usb_vbus>; + }; +}; diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 51e1305..80a3b55 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -671,6 +671,39 @@ }; }; + usb2: usb@11200000 { + compatible = "mediatek,mt2701-musb", + "mediatek,mtk-musb"; + reg = <0 0x11200000 0 0x1000>; + interrupts = ; + interrupt-names = "mc"; + phys = <&u2port2 PHY_TYPE_USB2>; + dr_mode = "otg"; + clocks = <&pericfg CLK_PERI_USB0>, + <&pericfg CLK_PERI_USB0_MCU>, + <&pericfg CLK_PERI_USB_SLV>; + clock-names = "main","mcu","univpll"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; + status = "disabled"; + }; + + u2phy0: usb-phy@11210000 { + compatible = "mediatek,generic-tphy-v1"; + reg = <0 0x11210000 0 0x0800>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "okay"; + + u2port2: usb-phy@1a1c4800 { + reg = <0 0x11210800 0 0x0100>; + clocks = <&topckgen CLK_TOP_USB_PHY48M>; + clock-names = "ref"; + #phy-cells = <1>; + status = "okay"; + }; + }; + ethsys: syscon@1b000000 { compatible = "mediatek,mt2701-ethsys", "syscon"; reg = <0 0x1b000000 0 0x1000>;