From patchwork Wed Oct 23 11:21:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 11206403 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D81BB1390 for ; Wed, 23 Oct 2019 11:23:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C0D372084B for ; Wed, 23 Oct 2019 11:23:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405030AbfJWLXK (ORCPT ); Wed, 23 Oct 2019 07:23:10 -0400 Received: from mga05.intel.com ([192.55.52.43]:63100 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404831AbfJWLWE (ORCPT ); Wed, 23 Oct 2019 07:22:04 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Oct 2019 04:22:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,220,1569308400"; d="scan'208";a="210009628" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga002.jf.intel.com with ESMTP; 23 Oct 2019 04:22:00 -0700 Received: by black.fi.intel.com (Postfix, from userid 1001) id 6DDAC5BA; Wed, 23 Oct 2019 14:21:55 +0300 (EEST) From: Mika Westerberg To: linux-usb@vger.kernel.org Cc: Andreas Noever , Michael Jamet , Mika Westerberg , Yehezkel Bernat , Rajmohan Mani , Nicholas Johnson , Lukas Wunner , Greg Kroah-Hartman , Alan Stern , Mario.Limonciello@dell.com, Anthony Wong , Oliver Neukum , Christian Kellner , linux-kernel@vger.kernel.org Subject: [PATCH 11/25] thunderbolt: Add default linking between lane adapters if not provided by DROM Date: Wed, 23 Oct 2019 14:21:40 +0300 Message-Id: <20191023112154.64235-12-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191023112154.64235-1-mika.westerberg@linux.intel.com> References: <20191023112154.64235-1-mika.westerberg@linux.intel.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org We currently read how sibling lane adapter ports relate each other from DROM (Device ROM). If the two lane adapter ports go through the same physical connector these lanes can then be bonded together. However, some cases DROM does not provide this information or it is missing completely (host routers typically do not have DROM). In this case we have hard-coded the relationship. Expand this to work with both legacy devices where lane adapter ports 1 and 2, and 3 and 4 are always linked together, and with USB4 devices where lane adapter 1 is always following lane adapter 0 or is disabled completely (see USB4 section 5.2.1 for more information). Signed-off-by: Mika Westerberg --- drivers/thunderbolt/eeprom.c | 11 ----------- drivers/thunderbolt/switch.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 11 deletions(-) diff --git a/drivers/thunderbolt/eeprom.c b/drivers/thunderbolt/eeprom.c index ee5196479854..8dd7de0cc826 100644 --- a/drivers/thunderbolt/eeprom.c +++ b/drivers/thunderbolt/eeprom.c @@ -514,17 +514,6 @@ int tb_drom_read(struct tb_switch *sw) * no entries). Hardcode the configuration here. */ tb_drom_read_uid_only(sw, &sw->uid); - - sw->ports[1].link_nr = 0; - sw->ports[2].link_nr = 1; - sw->ports[1].dual_link_port = &sw->ports[2]; - sw->ports[2].dual_link_port = &sw->ports[1]; - - sw->ports[3].link_nr = 0; - sw->ports[4].link_nr = 1; - sw->ports[3].dual_link_port = &sw->ports[4]; - sw->ports[4].dual_link_port = &sw->ports[3]; - return 0; } diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c index 7e2cde5da31c..404a78a82746 100644 --- a/drivers/thunderbolt/switch.c +++ b/drivers/thunderbolt/switch.c @@ -1926,6 +1926,36 @@ static int tb_switch_add_dma_port(struct tb_switch *sw) return -ESHUTDOWN; } +static void tb_switch_default_link_ports(struct tb_switch *sw) +{ + int i; + + for (i = 1; i <= sw->config.max_port_number; i += 2) { + struct tb_port *port = &sw->ports[i]; + struct tb_port *subordinate; + + if (!tb_port_is_null(port)) + continue; + + /* Check for the subordinate port */ + if (i == sw->config.max_port_number || + !tb_port_is_null(&sw->ports[i + 1])) + continue; + + /* Link them if not already done so (by DROM) */ + subordinate = &sw->ports[i + 1]; + if (!port->dual_link_port && !subordinate->dual_link_port) { + port->link_nr = 0; + port->dual_link_port = subordinate; + subordinate->link_nr = 1; + subordinate->dual_link_port = port; + + tb_sw_dbg(sw, "linked ports %d <-> %d\n", + port->port, subordinate->port); + } + } +} + static bool tb_switch_lane_bonding_possible(struct tb_switch *sw) { const struct tb_port *up = tb_upstream_port(sw); @@ -2099,6 +2129,8 @@ int tb_switch_add(struct tb_switch *sw) } } + tb_switch_default_link_ports(sw); + ret = tb_switch_update_link_attributes(sw); if (ret) return ret;