| Message ID | 20201123090114.12641-2-amelie.delaunay@st.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 2979ee7a91127a2d6fddd4e98d450ee782115772 |
| Headers | show |
| Series | STM32MP15 OTG params updates | expand |
On 11/23/2020 1:01 PM, Amelie Delaunay wrote: > STM32MP15 ahbcfg register default value sets Burst length/type (HBSTLEN) > to Single (32-bit accesses on AHB), which is not recommended, according > to STM32MP157 Reference manual [1]. > This patch sets Burst length/type (HBSTLEN) so that bus transactions > target 16x32 bit accesses. This improves OTG controller performance. > > [1] https://urldefense.com/v3/__https://www.st.com/resource/en/reference_manual/dm00327659.pdf__;!!A4F2R9G_pg!J1HTs3kobvYfS453htoIdnxhej4_os5Y5xwMfRtfhptE_QSeVw3O1mozY-v4AvE$ , p.3149 > > Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Acked-by: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com> > --- > drivers/usb/dwc2/params.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c > index 267543c3dc38..0df693319f0a 100644 > --- a/drivers/usb/dwc2/params.c > +++ b/drivers/usb/dwc2/params.c > @@ -177,6 +177,7 @@ static void dwc2_set_stm32mp15_fsotg_params(struct dwc2_hsotg *hsotg) > p->i2c_enable = false; > p->activate_stm_fs_transceiver = true; > p->activate_stm_id_vb_detection = true; > + p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; > p->power_down = DWC2_POWER_DOWN_PARAM_NONE; > } > > @@ -189,6 +190,7 @@ static void dwc2_set_stm32mp15_hsotg_params(struct dwc2_hsotg *hsotg) > p->host_rx_fifo_size = 440; > p->host_nperio_tx_fifo_size = 256; > p->host_perio_tx_fifo_size = 256; > + p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; > p->power_down = DWC2_POWER_DOWN_PARAM_NONE; > } > >
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index 267543c3dc38..0df693319f0a 100644 --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c @@ -177,6 +177,7 @@ static void dwc2_set_stm32mp15_fsotg_params(struct dwc2_hsotg *hsotg) p->i2c_enable = false; p->activate_stm_fs_transceiver = true; p->activate_stm_id_vb_detection = true; + p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; p->power_down = DWC2_POWER_DOWN_PARAM_NONE; } @@ -189,6 +190,7 @@ static void dwc2_set_stm32mp15_hsotg_params(struct dwc2_hsotg *hsotg) p->host_rx_fifo_size = 440; p->host_nperio_tx_fifo_size = 256; p->host_perio_tx_fifo_size = 256; + p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; p->power_down = DWC2_POWER_DOWN_PARAM_NONE; }
STM32MP15 ahbcfg register default value sets Burst length/type (HBSTLEN) to Single (32-bit accesses on AHB), which is not recommended, according to STM32MP157 Reference manual [1]. This patch sets Burst length/type (HBSTLEN) so that bus transactions target 16x32 bit accesses. This improves OTG controller performance. [1] https://www.st.com/resource/en/reference_manual/dm00327659.pdf, p.3149 Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> --- drivers/usb/dwc2/params.c | 2 ++ 1 file changed, 2 insertions(+)