diff mbox series

[3/3] thunderbolt: Align USB4 router wakes configuration with the CM guide

Message ID 20210517130713.30005-4-mika.westerberg@linux.intel.com (mailing list archive)
State Accepted
Commit 3caf88871c6ad0bf7c5fca8a6f7fcada1891a891
Headers show
Series thunderbolt: Cleanup ABI entries and update wakes | expand

Commit Message

Mika Westerberg May 17, 2021, 1:07 p.m. UTC
The USB4 Configuration Manager guide suggests that the USB4 port wakes
are configured in a certain way, like that when the port is configured
the wake-on-connect should not be set and so forth, so align the driver
with this.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/thunderbolt/usb4.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/thunderbolt/usb4.c b/drivers/thunderbolt/usb4.c
index 7e8b5ca3114c..b56af7b0a093 100644
--- a/drivers/thunderbolt/usb4.c
+++ b/drivers/thunderbolt/usb4.c
@@ -399,12 +399,18 @@  int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
 
 		val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
 
-		if (flags & TB_WAKE_ON_CONNECT)
-			val |= PORT_CS_19_WOC;
-		if (flags & TB_WAKE_ON_DISCONNECT)
-			val |= PORT_CS_19_WOD;
-		if (flags & TB_WAKE_ON_USB4)
+		if (tb_is_upstream_port(port)) {
 			val |= PORT_CS_19_WOU4;
+		} else {
+			bool configured = val & PORT_CS_19_PC;
+
+			if ((flags & TB_WAKE_ON_CONNECT) && !configured)
+				val |= PORT_CS_19_WOC;
+			if ((flags & TB_WAKE_ON_DISCONNECT) && configured)
+				val |= PORT_CS_19_WOD;
+			if ((flags & TB_WAKE_ON_USB4) && configured)
+				val |= PORT_CS_19_WOU4;
+		}
 
 		ret = tb_port_write(port, &val, TB_CFG_PORT,
 				    port->cap_usb4 + PORT_CS_19, 1);