| Message ID | 20211102060049.1843-2-chunfeng.yun@mediatek.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 43d48bbb1486165e9832af427c0e9e53d5500f8a |
| Headers | show |
| Series | [1/3] dt-bindings: usb: mtk-xhci: add support ip-sleep for mt8195 | expand |
On 02/11/2021 07:00, Chunfeng Yun wrote: > Add support ip-sleep wakeup for mt8195, it's a specific revision for > each USB controller, and not following IPM rule. > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- > drivers/usb/host/xhci-mtk.c | 37 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c > index c53f6f276d5c..63f4b6984667 100644 > --- a/drivers/usb/host/xhci-mtk.c > +++ b/drivers/usb/host/xhci-mtk.c > @@ -95,6 +95,19 @@ > #define WC0_SSUSB0_CDEN BIT(6) > #define WC0_IS_SPM_EN BIT(1) > > +/* mt8195 */ > +#define PERI_WK_CTRL0_8195 0x04 > +#define WC0_IS_P_95 BIT(30) /* polarity */ > +#define WC0_IS_C_95(x) ((u32)(((x) & 0x7) << 27)) > +#define WC0_IS_EN_P3_95 BIT(26) > +#define WC0_IS_EN_P2_95 BIT(25) > +#define WC0_IS_EN_P1_95 BIT(24) > + > +#define PERI_WK_CTRL1_8195 0x20 > +#define WC1_IS_C_95(x) ((u32)(((x) & 0xf) << 28)) > +#define WC1_IS_P_95 BIT(12) > +#define WC1_IS_EN_P0_95 BIT(6) > + > /* mt2712 etc */ > #define PERI_SSUSB_SPM_CTRL 0x0 > #define SSC_IP_SLEEP_EN BIT(4) > @@ -105,6 +118,10 @@ enum ssusb_uwk_vers { > SSUSB_UWK_V2, > SSUSB_UWK_V1_1 = 101, /* specific revision 1.01 */ > SSUSB_UWK_V1_2, /* specific revision 1.2 */ > + SSUSB_UWK_V1_3, /* mt8195 IP0 */ > + SSUSB_UWK_V1_4, /* mt8195 IP1 */ > + SSUSB_UWK_V1_5, /* mt8195 IP2 */ > + SSUSB_UWK_V1_6, /* mt8195 IP3 */ > }; > > /* > @@ -307,6 +324,26 @@ static void usb_wakeup_ip_sleep_set(struct xhci_hcd_mtk *mtk, bool enable) > msk = WC0_SSUSB0_CDEN | WC0_IS_SPM_EN; > val = enable ? msk : 0; > break; > + case SSUSB_UWK_V1_3: > + reg = mtk->uwk_reg_base + PERI_WK_CTRL1_8195; > + msk = WC1_IS_EN_P0_95 | WC1_IS_C_95(0xf) | WC1_IS_P_95; > + val = enable ? (WC1_IS_EN_P0_95 | WC1_IS_C_95(0x1)) : 0; > + break; > + case SSUSB_UWK_V1_4: > + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8195; > + msk = WC0_IS_EN_P1_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; > + val = enable ? (WC0_IS_EN_P1_95 | WC0_IS_C_95(0x1)) : 0; > + break; > + case SSUSB_UWK_V1_5: > + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8195; > + msk = WC0_IS_EN_P2_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; > + val = enable ? (WC0_IS_EN_P2_95 | WC0_IS_C_95(0x1)) : 0; > + break; > + case SSUSB_UWK_V1_6: > + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8195; > + msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; > + val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : 0; > + break; > case SSUSB_UWK_V2: > reg = mtk->uwk_reg_base + PERI_SSUSB_SPM_CTRL; > msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN; >
Il 02/11/21 07:00, Chunfeng Yun ha scritto: > Add support ip-sleep wakeup for mt8195, it's a specific revision for > each USB controller, and not following IPM rule. > > Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> > Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c index c53f6f276d5c..63f4b6984667 100644 --- a/drivers/usb/host/xhci-mtk.c +++ b/drivers/usb/host/xhci-mtk.c @@ -95,6 +95,19 @@ #define WC0_SSUSB0_CDEN BIT(6) #define WC0_IS_SPM_EN BIT(1) +/* mt8195 */ +#define PERI_WK_CTRL0_8195 0x04 +#define WC0_IS_P_95 BIT(30) /* polarity */ +#define WC0_IS_C_95(x) ((u32)(((x) & 0x7) << 27)) +#define WC0_IS_EN_P3_95 BIT(26) +#define WC0_IS_EN_P2_95 BIT(25) +#define WC0_IS_EN_P1_95 BIT(24) + +#define PERI_WK_CTRL1_8195 0x20 +#define WC1_IS_C_95(x) ((u32)(((x) & 0xf) << 28)) +#define WC1_IS_P_95 BIT(12) +#define WC1_IS_EN_P0_95 BIT(6) + /* mt2712 etc */ #define PERI_SSUSB_SPM_CTRL 0x0 #define SSC_IP_SLEEP_EN BIT(4) @@ -105,6 +118,10 @@ enum ssusb_uwk_vers { SSUSB_UWK_V2, SSUSB_UWK_V1_1 = 101, /* specific revision 1.01 */ SSUSB_UWK_V1_2, /* specific revision 1.2 */ + SSUSB_UWK_V1_3, /* mt8195 IP0 */ + SSUSB_UWK_V1_4, /* mt8195 IP1 */ + SSUSB_UWK_V1_5, /* mt8195 IP2 */ + SSUSB_UWK_V1_6, /* mt8195 IP3 */ }; /* @@ -307,6 +324,26 @@ static void usb_wakeup_ip_sleep_set(struct xhci_hcd_mtk *mtk, bool enable) msk = WC0_SSUSB0_CDEN | WC0_IS_SPM_EN; val = enable ? msk : 0; break; + case SSUSB_UWK_V1_3: + reg = mtk->uwk_reg_base + PERI_WK_CTRL1_8195; + msk = WC1_IS_EN_P0_95 | WC1_IS_C_95(0xf) | WC1_IS_P_95; + val = enable ? (WC1_IS_EN_P0_95 | WC1_IS_C_95(0x1)) : 0; + break; + case SSUSB_UWK_V1_4: + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8195; + msk = WC0_IS_EN_P1_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; + val = enable ? (WC0_IS_EN_P1_95 | WC0_IS_C_95(0x1)) : 0; + break; + case SSUSB_UWK_V1_5: + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8195; + msk = WC0_IS_EN_P2_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; + val = enable ? (WC0_IS_EN_P2_95 | WC0_IS_C_95(0x1)) : 0; + break; + case SSUSB_UWK_V1_6: + reg = mtk->uwk_reg_base + PERI_WK_CTRL0_8195; + msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; + val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : 0; + break; case SSUSB_UWK_V2: reg = mtk->uwk_reg_base + PERI_SSUSB_SPM_CTRL; msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;
Add support ip-sleep wakeup for mt8195, it's a specific revision for each USB controller, and not following IPM rule. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> --- drivers/usb/host/xhci-mtk.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+)