| Message ID | 20220120170818.1311306-2-robert.hancock@calian.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Xilinx ZynqMP USB fixes | expand |
On 1/20/22 18:08, Robert Hancock wrote: > It appears that the PIPE clock should not be selected when only USB 2.0 > is being used in the design and no USB 3.0 reference clock is used. Fix > to set the correct value depending on whether a USB3 PHY is present. > > Fixes: 84770f028fab ("usb: dwc3: Add driver for Xilinx platforms") > Signed-off-by: Robert Hancock <robert.hancock@calian.com> > --- > drivers/usb/dwc3/dwc3-xilinx.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c > index 9cc3ad701a29..3bc035376394 100644 > --- a/drivers/usb/dwc3/dwc3-xilinx.c > +++ b/drivers/usb/dwc3/dwc3-xilinx.c > @@ -167,8 +167,11 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) > /* Set PIPE Power Present signal in FPD Power Present Register*/ > writel(FPD_POWER_PRSNT_OPTION, priv_data->regs + XLNX_USB_FPD_POWER_PRSNT); > > - /* Set the PIPE Clock Select bit in FPD PIPE Clock register */ > - writel(PIPE_CLK_SELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK); > + /* Set the PIPE Clock Select bit in FPD PIPE Clock register if a USB3 nit: this is likely comment for net not for the rest. You should use multiline comment in this format. /* * Set... M
On Fri, 2022-01-21 at 08:53 +0100, Michal Simek wrote: > > On 1/20/22 18:08, Robert Hancock wrote: > > It appears that the PIPE clock should not be selected when only USB 2.0 > > is being used in the design and no USB 3.0 reference clock is used. Fix > > to set the correct value depending on whether a USB3 PHY is present. > > > > Fixes: 84770f028fab ("usb: dwc3: Add driver for Xilinx platforms") > > Signed-off-by: Robert Hancock <robert.hancock@calian.com> > > --- > > drivers/usb/dwc3/dwc3-xilinx.c | 7 +++++-- > > 1 file changed, 5 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3- > > xilinx.c > > index 9cc3ad701a29..3bc035376394 100644 > > --- a/drivers/usb/dwc3/dwc3-xilinx.c > > +++ b/drivers/usb/dwc3/dwc3-xilinx.c > > @@ -167,8 +167,11 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx > > *priv_data) > > /* Set PIPE Power Present signal in FPD Power Present Register*/ > > writel(FPD_POWER_PRSNT_OPTION, priv_data->regs + > > XLNX_USB_FPD_POWER_PRSNT); > > > > - /* Set the PIPE Clock Select bit in FPD PIPE Clock register */ > > - writel(PIPE_CLK_SELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK); > > + /* Set the PIPE Clock Select bit in FPD PIPE Clock register if a USB3 > > nit: this is likely comment for net not for the rest. > You should use multiline comment in this format. > /* > * Set... > > M Yup, will change.
diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c index 9cc3ad701a29..3bc035376394 100644 --- a/drivers/usb/dwc3/dwc3-xilinx.c +++ b/drivers/usb/dwc3/dwc3-xilinx.c @@ -167,8 +167,11 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) /* Set PIPE Power Present signal in FPD Power Present Register*/ writel(FPD_POWER_PRSNT_OPTION, priv_data->regs + XLNX_USB_FPD_POWER_PRSNT); - /* Set the PIPE Clock Select bit in FPD PIPE Clock register */ - writel(PIPE_CLK_SELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK); + /* Set the PIPE Clock Select bit in FPD PIPE Clock register if a USB3 + * PHY is in use, deselect otherwise + */ + writel(usb3_phy ? PIPE_CLK_SELECT : PIPE_CLK_DESELECT, + priv_data->regs + XLNX_USB_FPD_PIPE_CLK); ret = reset_control_deassert(crst); if (ret < 0) {
It appears that the PIPE clock should not be selected when only USB 2.0 is being used in the design and no USB 3.0 reference clock is used. Fix to set the correct value depending on whether a USB3 PHY is present. Fixes: 84770f028fab ("usb: dwc3: Add driver for Xilinx platforms") Signed-off-by: Robert Hancock <robert.hancock@calian.com> --- drivers/usb/dwc3/dwc3-xilinx.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)