| Message ID | 20220126234017.3619108-4-robert.hancock@calian.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Xilinx ZynqMP USB fixes | expand |
Hi Rob, On 1/26/22 6:40 PM, Robert Hancock wrote: > Hook up an optional GPIO-based reset for the connected USB ULPI PHY > device. This is typically already done by the first-stage boot loader, > however it can be more robust to ensure this reset is done prior to > loading the driver in Linux. > > Based on a patch "usb: dwc3: xilinx: Add gpio-reset support" in the > Xilinx kernel tree by Piyush Mehta <piyush.mehta@xilinx.com>. > > Signed-off-by: Robert Hancock <robert.hancock@calian.com> > --- > drivers/usb/dwc3/dwc3-xilinx.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c > index a6f3a9b38789..1ee6011ada44 100644 > --- a/drivers/usb/dwc3/dwc3-xilinx.c > +++ b/drivers/usb/dwc3/dwc3-xilinx.c > @@ -11,6 +11,7 @@ > #include <linux/slab.h> > #include <linux/clk.h> > #include <linux/of.h> > +#include <linux/gpio/consumer.h> > #include <linux/platform_device.h> > #include <linux/dma-mapping.h> > #include <linux/of_platform.h> > @@ -101,6 +102,7 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) > struct phy *usb3_phy; > int ret = 0; > u32 reg; > + struct gpio_desc *reset_gpio; > > usb3_phy = devm_phy_optional_get(dev, "usb3-phy"); > if (IS_ERR(usb3_phy)) { > @@ -110,6 +112,14 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) > goto err; > } > > + reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); > + if (IS_ERR(reset_gpio)) { > + ret = PTR_ERR(reset_gpio); > + dev_err_probe(dev, ret, > + "Failed to get reset gpio\n"); > + goto err; > + } > + > /* > * The following core resets are not required unless a USB3 PHY > * is used, and the subsequent register settings are not required > @@ -201,6 +211,15 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) > } > > skip_usb3_phy: > + /* ulpi reset via gpio-modepin or gpio-framework driver */ > + if (reset_gpio) { > + /* Toggle ulpi to reset the phy. */ > + gpiod_set_value(reset_gpio, 0); > + usleep_range(5000, 10000); /* delay */ > + gpiod_set_value(reset_gpio, 1); > + usleep_range(5000, 10000); /* delay */ > + } > + > /* > * This routes the USB DMA traffic to go through FPD path instead > * of reaching DDR directly. This traffic routing is needed to > Do we need to have this in dwc3? Why not just use the usb-nop-xceiv driver (aka usb_phy_generic)? --Sean
On Thu, 2022-01-27 at 15:10 -0500, Sean Anderson wrote: > Hi Rob, > > On 1/26/22 6:40 PM, Robert Hancock wrote: > > Hook up an optional GPIO-based reset for the connected USB ULPI PHY > > device. This is typically already done by the first-stage boot loader, > > however it can be more robust to ensure this reset is done prior to > > loading the driver in Linux. > > > > Based on a patch "usb: dwc3: xilinx: Add gpio-reset support" in the > > Xilinx kernel tree by Piyush Mehta <piyush.mehta@xilinx.com>. > > > > Signed-off-by: Robert Hancock <robert.hancock@calian.com> > > --- > > drivers/usb/dwc3/dwc3-xilinx.c | 19 +++++++++++++++++++ > > 1 file changed, 19 insertions(+) > > > > diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3- > > xilinx.c > > index a6f3a9b38789..1ee6011ada44 100644 > > --- a/drivers/usb/dwc3/dwc3-xilinx.c > > +++ b/drivers/usb/dwc3/dwc3-xilinx.c > > @@ -11,6 +11,7 @@ > > #include <linux/slab.h> > > #include <linux/clk.h> > > #include <linux/of.h> > > +#include <linux/gpio/consumer.h> > > #include <linux/platform_device.h> > > #include <linux/dma-mapping.h> > > #include <linux/of_platform.h> > > @@ -101,6 +102,7 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx > > *priv_data) > > struct phy *usb3_phy; > > int ret = 0; > > u32 reg; > > + struct gpio_desc *reset_gpio; > > > > usb3_phy = devm_phy_optional_get(dev, "usb3-phy"); > > if (IS_ERR(usb3_phy)) { > > @@ -110,6 +112,14 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx > > *priv_data) > > goto err; > > } > > > > + reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); > > + if (IS_ERR(reset_gpio)) { > > + ret = PTR_ERR(reset_gpio); > > + dev_err_probe(dev, ret, > > + "Failed to get reset gpio\n"); > > + goto err; > > + } > > + > > /* > > * The following core resets are not required unless a USB3 PHY > > * is used, and the subsequent register settings are not required > > @@ -201,6 +211,15 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx > > *priv_data) > > } > > > > skip_usb3_phy: > > + /* ulpi reset via gpio-modepin or gpio-framework driver */ > > + if (reset_gpio) { > > + /* Toggle ulpi to reset the phy. */ > > + gpiod_set_value(reset_gpio, 0); > > + usleep_range(5000, 10000); /* delay */ > > + gpiod_set_value(reset_gpio, 1); > > + usleep_range(5000, 10000); /* delay */ > > + } > > + > > /* > > * This routes the USB DMA traffic to go through FPD path instead > > * of reaching DDR directly. This traffic routing is needed to > > > > Do we need to have this in dwc3? Why not just use the usb-nop-xceiv driver > (aka usb_phy_generic)? I hadn't noticed that option. Just tried it out and it seems like it does what's needed. So patches 2 and 3 can be dispensed with. Patch 1 is still needed however, I may resubmit that as a standalone patch.. > > --Sean
Hello Robert, Thanks for patch. All the Xilinx USB resets are ACTIVE_LOW reset. Regards, Piyush Mehta > -----Original Message----- > From: Robert Hancock <robert.hancock@calian.com> > Sent: Thursday, January 27, 2022 5:10 AM > To: linux-usb@vger.kernel.org > Cc: balbi@kernel.org; gregkh@linuxfoundation.org; Michal Simek > <michals@xilinx.com>; Manish Narani <MNARANI@xilinx.com>; > sean.anderson@seco.com; robh+dt@kernel.org; devicetree@vger.kernel.org; > Piyush Mehta <piyushm@xilinx.com>; Robert Hancock > <robert.hancock@calian.com> > Subject: [PATCH v8 3/3] usb: dwc3: xilinx: Add ULPI PHY reset handling > > Hook up an optional GPIO-based reset for the connected USB ULPI PHY device. > This is typically already done by the first-stage boot loader, however it can be > more robust to ensure this reset is done prior to loading the driver in Linux. > > Based on a patch "usb: dwc3: xilinx: Add gpio-reset support" in the Xilinx kernel > tree by Piyush Mehta <piyush.mehta@xilinx.com>. > > Signed-off-by: Robert Hancock <robert.hancock@calian.com> > --- > drivers/usb/dwc3/dwc3-xilinx.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c > index a6f3a9b38789..1ee6011ada44 100644 > --- a/drivers/usb/dwc3/dwc3-xilinx.c > +++ b/drivers/usb/dwc3/dwc3-xilinx.c > @@ -11,6 +11,7 @@ > #include <linux/slab.h> > #include <linux/clk.h> > #include <linux/of.h> > +#include <linux/gpio/consumer.h> > #include <linux/platform_device.h> > #include <linux/dma-mapping.h> > #include <linux/of_platform.h> > @@ -101,6 +102,7 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx > *priv_data) > struct phy *usb3_phy; > int ret = 0; > u32 reg; > + struct gpio_desc *reset_gpio; > > usb3_phy = devm_phy_optional_get(dev, "usb3-phy"); > if (IS_ERR(usb3_phy)) { > @@ -110,6 +112,14 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx > *priv_data) > goto err; > } > > + reset_gpio = devm_gpiod_get_optional(dev, "reset", > GPIOD_OUT_HIGH); reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); Note: Xilinx Support active low resets > + if (IS_ERR(reset_gpio)) { > + ret = PTR_ERR(reset_gpio); > + dev_err_probe(dev, ret, > + "Failed to get reset gpio\n"); > + goto err; > + } > + > /* > * The following core resets are not required unless a USB3 PHY > * is used, and the subsequent register settings are not required @@ - > 201,6 +211,15 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx > *priv_data) > } > > skip_usb3_phy: > + /* ulpi reset via gpio-modepin or gpio-framework driver */ > + if (reset_gpio) { > + /* Toggle ulpi to reset the phy. */ > + gpiod_set_value(reset_gpio, 0); > + usleep_range(5000, 10000); /* delay */ > + gpiod_set_value(reset_gpio, 1); > + usleep_range(5000, 10000); /* delay */ > + } > + > /* > * This routes the USB DMA traffic to go through FPD path instead > * of reaching DDR directly. This traffic routing is needed to > -- > 2.31.1
diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c index a6f3a9b38789..1ee6011ada44 100644 --- a/drivers/usb/dwc3/dwc3-xilinx.c +++ b/drivers/usb/dwc3/dwc3-xilinx.c @@ -11,6 +11,7 @@ #include <linux/slab.h> #include <linux/clk.h> #include <linux/of.h> +#include <linux/gpio/consumer.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> #include <linux/of_platform.h> @@ -101,6 +102,7 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) struct phy *usb3_phy; int ret = 0; u32 reg; + struct gpio_desc *reset_gpio; usb3_phy = devm_phy_optional_get(dev, "usb3-phy"); if (IS_ERR(usb3_phy)) { @@ -110,6 +112,14 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) goto err; } + reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(reset_gpio)) { + ret = PTR_ERR(reset_gpio); + dev_err_probe(dev, ret, + "Failed to get reset gpio\n"); + goto err; + } + /* * The following core resets are not required unless a USB3 PHY * is used, and the subsequent register settings are not required @@ -201,6 +211,15 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) } skip_usb3_phy: + /* ulpi reset via gpio-modepin or gpio-framework driver */ + if (reset_gpio) { + /* Toggle ulpi to reset the phy. */ + gpiod_set_value(reset_gpio, 0); + usleep_range(5000, 10000); /* delay */ + gpiod_set_value(reset_gpio, 1); + usleep_range(5000, 10000); /* delay */ + } + /* * This routes the USB DMA traffic to go through FPD path instead * of reaching DDR directly. This traffic routing is needed to
Hook up an optional GPIO-based reset for the connected USB ULPI PHY device. This is typically already done by the first-stage boot loader, however it can be more robust to ensure this reset is done prior to loading the driver in Linux. Based on a patch "usb: dwc3: xilinx: Add gpio-reset support" in the Xilinx kernel tree by Piyush Mehta <piyush.mehta@xilinx.com>. Signed-off-by: Robert Hancock <robert.hancock@calian.com> --- drivers/usb/dwc3/dwc3-xilinx.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)