From patchwork Mon Jul 11 07:23:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913023 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01185C43334 for ; Mon, 11 Jul 2022 07:28:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229900AbiGKH2L (ORCPT ); Mon, 11 Jul 2022 03:28:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229628AbiGKH2K (ORCPT ); Mon, 11 Jul 2022 03:28:10 -0400 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF04213F6D for ; Mon, 11 Jul 2022 00:28:09 -0700 (PDT) Received: by mail-pl1-x62e.google.com with SMTP id q5so3723558plr.11 for ; Mon, 11 Jul 2022 00:28:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DYEnVLpQyHzRpDYIlQiFIUGlyV0bCp99JLRQGIyhka8=; b=ZnXi/uGZtCZD8AXO7vZ8GGC7HOg9PLziEbYJQjdiPncsRb3Hnrw1Ha7u426hcigE1V zZeFeUt8V2AFpfXN4fyoELF5P/y90IOMaxNuojeHNpBn4FEDr3hTws3bDA5nxO9jWlic yd0Kigzg6DVm0fgLai/x/5cREpr32kmglbNAA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DYEnVLpQyHzRpDYIlQiFIUGlyV0bCp99JLRQGIyhka8=; b=b/KXBDSRVeVDmUd8Adgzq0oOYxDKXBg7IwxcqAyOe5SVuO6YVngCw+Dda55+oGFqCC TOVvaEOELBBfOhKcfGt3UN3xGUf4xSY7tjoXFAdOeQjez42ADuvvNIMpBwqVCKMsEqFT 2pozy4CPyfKzEc0+3WdHQILztUlJGmAP5W3AKK0ILgBM5ncNcr7nr82ws9KbvBtaL5pA Nk5rpM2hmv3js2K/9g/Il8yV/ls8Lkjw/uD9LL6upzL1Yd+Wq3beIANm+PCz2DPPB/Z0 Wcm7L+t3Zfb5OXR9+n1PWehmZ/NiuYKgyEuXfQw2aGSpbfWM0GIvx3osTQ1hivURnJW9 vT7w== X-Gm-Message-State: AJIora997KQU2T6yVFJJQrSqSoll2Tsuqc1xCGjIBCfkVGFvici6tICm f5d4DQtRdPn2K2sJ8DAqltDkXg== X-Google-Smtp-Source: AGRyM1sNwW0WjdGUS0MHFW0lDLimexeWHHAMfMZlQZivnlBsQh1I4HmWaKxi7N0zFzZW0/GLhER/pQ== X-Received: by 2002:a17:902:eaca:b0:16b:dbde:130d with SMTP id p10-20020a170902eaca00b0016bdbde130dmr17172276pld.48.1657524489432; Mon, 11 Jul 2022 00:28:09 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.28.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:28:09 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , kernel test robot , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 6/9] platform/chrome: cros_typec_switch: Add event check Date: Mon, 11 Jul 2022 07:23:00 +0000 Message-Id: <20220711072333.2064341-7-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The Chrome EC updates Type-C status events when mux set requests from the Application Processor (AP) are completed. Add a check to the flow of configuring muxes to look for this status done bit, so that the driver is aware that the mux set completed successfully or not. Reported-by: kernel test robot Signed-off-by: Prashant Malani --- Changes since v3: - No changes. Changes since v2: - Fixed missing "static" identifier. Changes since v1: - No changes. drivers/platform/chrome/cros_typec_switch.c | 72 ++++++++++++++++++++- 1 file changed, 70 insertions(+), 2 deletions(-) diff --git a/drivers/platform/chrome/cros_typec_switch.c b/drivers/platform/chrome/cros_typec_switch.c index b50ecedce662..7c01957a032d 100644 --- a/drivers/platform/chrome/cros_typec_switch.c +++ b/drivers/platform/chrome/cros_typec_switch.c @@ -7,6 +7,8 @@ */ #include +#include +#include #include #include #include @@ -63,6 +65,40 @@ static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *al return ret; } +static int cros_typec_send_clear_event(struct cros_typec_switch_data *sdata, int port_num, + u32 events_mask) +{ + struct ec_params_typec_control req = { + .port = port_num, + .command = TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, + .clear_events_mask = events_mask, + }; + + return cros_ec_command(sdata->ec, 0, EC_CMD_TYPEC_CONTROL, &req, + sizeof(req), NULL, 0); +} + +static bool cros_typec_check_event(struct cros_typec_switch_data *sdata, int port_num, u32 mask) +{ + struct ec_response_typec_status resp; + struct ec_params_typec_status req = { + .port = port_num, + }; + int ret; + + ret = cros_ec_command(sdata->ec, 0, EC_CMD_TYPEC_STATUS, &req, sizeof(req), + &resp, sizeof(resp)); + if (ret < 0) { + dev_warn(sdata->dev, "EC_CMD_TYPEC_STATUS failed for port: %d\n", port_num); + return false; + } + + if (resp.events & mask) + return true; + + return false; +} + /* * The Chrome EC treats both mode-switches and retimers as "muxes" for the purposes of the * host command API. This common function configures and verifies the retimer/mode-switch @@ -71,12 +107,44 @@ static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *al static int cros_typec_configure_mux(struct cros_typec_switch_data *sdata, int port_num, int index, unsigned long mode, struct typec_altmode *alt) { - int ret = cros_typec_get_mux_state(mode, alt); + unsigned long end; + u32 event_mask; + u8 mux_state; + int ret; + + ret = cros_typec_get_mux_state(mode, alt); + if (ret < 0) + return ret; + mux_state = (u8)ret; + /* Clear any old mux set done event. */ + if (index == 0) + event_mask = PD_STATUS_EVENT_MUX_0_SET_DONE; + else + event_mask = PD_STATUS_EVENT_MUX_1_SET_DONE; + + ret = cros_typec_send_clear_event(sdata, port_num, event_mask); + if (ret < 0) + return ret; + + /* Send the set command. */ + ret = cros_typec_cmd_mux_set(sdata, port_num, index, mux_state); if (ret < 0) return ret; - return cros_typec_cmd_mux_set(sdata, port_num, index, (u8)ret); + /* Check for the mux set done event. */ + end = jiffies + msecs_to_jiffies(1000); + do { + if (cros_typec_check_event(sdata, port_num, event_mask)) + return 0; + + usleep_range(500, 1000); + } while (time_before(jiffies, end)); + + dev_err(sdata->dev, "Timed out waiting for mux set done on index: %d, state: %d\n", + index, mux_state); + + return -ETIMEDOUT; } static int cros_typec_retimer_set(struct typec_retimer *retimer, struct typec_retimer_state *state)