@@ -71,6 +71,8 @@
#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4 0x161e
#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5 0x161c
#define PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6 0x161f
+#define PCI_DEVICE_ID_AMD_PINK_SARDINE_XHCI_1 0x15b9
+#define PCI_DEVICE_ID_AMD_PINK_SARDINE_XHCI_2 0x15ba
#define PCI_DEVICE_ID_ASMEDIA_1042_XHCI 0x1042
#define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI 0x1142
@@ -100,6 +102,8 @@ static const struct pci_device_id runtime_allow_pci_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_5) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_REMBRANDT_XHCI_6) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_PINK_SARDINE_XHCI_1) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_PINK_SARDINE_XHCI_2) },
{ 0 }
};
The XHCI controllers not connected to the USB4 controller via a device link can support D3. For optimal runtime power consumption on AMD Pink Sardine, all XHCI controllers must support runtime suspend. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> --- RFC v1->PATCH v1 * Rebase on moving IDs into a table --- drivers/usb/host/xhci-pci.c | 4 ++++ 1 file changed, 4 insertions(+)