| Message ID | 20240122111809.148546-2-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 4158af057c7f84790d7b04f589d5b8a93fddf469 |
| Headers | show |
| Series | [v2,1/2] dt-bindings: usb: mtu3: Add MT8195 MTU3 ip-sleep support | expand |
On 22/01/2024 12:18, AngeloGioacchino Del Regno wrote: > Add support for the ip-sleep wakeup functionality on the three MTU3 > controllers found on the MT8195 SoC. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- > > Changes in v2: > - Dropped unused definition for WC0_IS_EN_P1_95 > > drivers/usb/mtu3/mtu3_host.c | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c > index 9f2be22af844..7c657ea2dabd 100644 > --- a/drivers/usb/mtu3/mtu3_host.c > +++ b/drivers/usb/mtu3/mtu3_host.c > @@ -34,6 +34,18 @@ > #define WC0_SSUSB0_CDEN BIT(6) > #define WC0_IS_SPM_EN BIT(1) > > +/* mt8195 */ > +#define PERI_WK_CTRL0_8195 0x04 > +#define WC0_IS_P_95 BIT(30) /* polarity */ > +#define WC0_IS_C_95(x) ((u32)(((x) & 0x7) << 27)) > +#define WC0_IS_EN_P3_95 BIT(26) > +#define WC0_IS_EN_P2_95 BIT(25) > + > +#define PERI_WK_CTRL1_8195 0x20 > +#define WC1_IS_C_95(x) ((u32)(((x) & 0xf) << 28)) > +#define WC1_IS_P_95 BIT(12) > +#define WC1_IS_EN_P0_95 BIT(6) > + > /* mt2712 etc */ > #define PERI_SSUSB_SPM_CTRL 0x0 > #define SSC_IP_SLEEP_EN BIT(4) > @@ -44,6 +56,9 @@ enum ssusb_uwk_vers { > SSUSB_UWK_V2, > SSUSB_UWK_V1_1 = 101, /* specific revision 1.01 */ > SSUSB_UWK_V1_2, /* specific revision 1.02 */ > + SSUSB_UWK_V1_3, /* mt8195 IP0 */ > + SSUSB_UWK_V1_5 = 105, /* mt8195 IP2 */ > + SSUSB_UWK_V1_6, /* mt8195 IP3 */ > }; > > /* > @@ -70,6 +85,21 @@ static void ssusb_wakeup_ip_sleep_set(struct ssusb_mtk *ssusb, bool enable) > msk = WC0_SSUSB0_CDEN | WC0_IS_SPM_EN; > val = enable ? msk : 0; > break; > + case SSUSB_UWK_V1_3: > + reg = ssusb->uwk_reg_base + PERI_WK_CTRL1_8195; > + msk = WC1_IS_EN_P0_95 | WC1_IS_C_95(0xf) | WC1_IS_P_95; > + val = enable ? (WC1_IS_EN_P0_95 | WC1_IS_C_95(0x1)) : 0; > + break; > + case SSUSB_UWK_V1_5: > + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8195; > + msk = WC0_IS_EN_P2_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; > + val = enable ? (WC0_IS_EN_P2_95 | WC0_IS_C_95(0x1)) : 0; > + break; > + case SSUSB_UWK_V1_6: > + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8195; > + msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; > + val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : 0; > + break; > case SSUSB_UWK_V2: > reg = ssusb->uwk_reg_base + PERI_SSUSB_SPM_CTRL; > msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;
On Mon, 2024-01-22 at 12:18 +0100, AngeloGioacchino Del Regno wrote: > Add support for the ip-sleep wakeup functionality on the three MTU3 > controllers found on the MT8195 SoC. > > Signed-off-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > > Changes in v2: > - Dropped unused definition for WC0_IS_EN_P1_95 > > drivers/usb/mtu3/mtu3_host.c | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/drivers/usb/mtu3/mtu3_host.c > b/drivers/usb/mtu3/mtu3_host.c > index 9f2be22af844..7c657ea2dabd 100644 > --- a/drivers/usb/mtu3/mtu3_host.c > +++ b/drivers/usb/mtu3/mtu3_host.c > @@ -34,6 +34,18 @@ > #define WC0_SSUSB0_CDEN BIT(6) > #define WC0_IS_SPM_EN BIT(1) > > +/* mt8195 */ > +#define PERI_WK_CTRL0_8195 0x04 > +#define WC0_IS_P_95 BIT(30) /* polarity */ > +#define WC0_IS_C_95(x) ((u32)(((x) & 0x7) << 27)) > +#define WC0_IS_EN_P3_95 BIT(26) > +#define WC0_IS_EN_P2_95 BIT(25) > + > +#define PERI_WK_CTRL1_8195 0x20 > +#define WC1_IS_C_95(x) ((u32)(((x) & 0xf) << 28)) > +#define WC1_IS_P_95 BIT(12) > +#define WC1_IS_EN_P0_95 BIT(6) > + > /* mt2712 etc */ > #define PERI_SSUSB_SPM_CTRL 0x0 > #define SSC_IP_SLEEP_EN BIT(4) > @@ -44,6 +56,9 @@ enum ssusb_uwk_vers { > SSUSB_UWK_V2, > SSUSB_UWK_V1_1 = 101, /* specific revision 1.01 */ > SSUSB_UWK_V1_2, /* specific revision 1.02 */ > + SSUSB_UWK_V1_3, /* mt8195 IP0 */ > + SSUSB_UWK_V1_5 = 105, /* mt8195 IP2 */ > + SSUSB_UWK_V1_6, /* mt8195 IP3 */ > }; > > /* > @@ -70,6 +85,21 @@ static void ssusb_wakeup_ip_sleep_set(struct > ssusb_mtk *ssusb, bool enable) > msk = WC0_SSUSB0_CDEN | WC0_IS_SPM_EN; > val = enable ? msk : 0; > break; > + case SSUSB_UWK_V1_3: > + reg = ssusb->uwk_reg_base + PERI_WK_CTRL1_8195; > + msk = WC1_IS_EN_P0_95 | WC1_IS_C_95(0xf) | WC1_IS_P_95; > + val = enable ? (WC1_IS_EN_P0_95 | WC1_IS_C_95(0x1)) : > 0; > + break; > + case SSUSB_UWK_V1_5: > + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8195; > + msk = WC0_IS_EN_P2_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; > + val = enable ? (WC0_IS_EN_P2_95 | WC0_IS_C_95(0x1)) : > 0; > + break; > + case SSUSB_UWK_V1_6: > + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8195; > + msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; > + val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : > 0; > + break; > case SSUSB_UWK_V2: > reg = ssusb->uwk_reg_base + PERI_SSUSB_SPM_CTRL; > msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN; which project will use ip-sleep wakeup for mt8195? only use device mode? As I know, when use upstream code to support dual-role mode on mt8195, there is a bug caused by hw limitation;
Il 04/02/24 07:03, Chunfeng Yun (云春峰) ha scritto: > On Mon, 2024-01-22 at 12:18 +0100, AngeloGioacchino Del Regno wrote: >> Add support for the ip-sleep wakeup functionality on the three MTU3 >> controllers found on the MT8195 SoC. >> >> Signed-off-by: AngeloGioacchino Del Regno < >> angelogioacchino.delregno@collabora.com> >> --- >> >> Changes in v2: >> - Dropped unused definition for WC0_IS_EN_P1_95 >> >> drivers/usb/mtu3/mtu3_host.c | 30 ++++++++++++++++++++++++++++++ >> 1 file changed, 30 insertions(+) >> >> diff --git a/drivers/usb/mtu3/mtu3_host.c >> b/drivers/usb/mtu3/mtu3_host.c >> index 9f2be22af844..7c657ea2dabd 100644 >> --- a/drivers/usb/mtu3/mtu3_host.c >> +++ b/drivers/usb/mtu3/mtu3_host.c >> @@ -34,6 +34,18 @@ >> #define WC0_SSUSB0_CDEN BIT(6) >> #define WC0_IS_SPM_EN BIT(1) >> >> +/* mt8195 */ >> +#define PERI_WK_CTRL0_8195 0x04 >> +#define WC0_IS_P_95 BIT(30) /* polarity */ >> +#define WC0_IS_C_95(x) ((u32)(((x) & 0x7) << 27)) >> +#define WC0_IS_EN_P3_95 BIT(26) >> +#define WC0_IS_EN_P2_95 BIT(25) >> + >> +#define PERI_WK_CTRL1_8195 0x20 >> +#define WC1_IS_C_95(x) ((u32)(((x) & 0xf) << 28)) >> +#define WC1_IS_P_95 BIT(12) >> +#define WC1_IS_EN_P0_95 BIT(6) >> + >> /* mt2712 etc */ >> #define PERI_SSUSB_SPM_CTRL 0x0 >> #define SSC_IP_SLEEP_EN BIT(4) >> @@ -44,6 +56,9 @@ enum ssusb_uwk_vers { >> SSUSB_UWK_V2, >> SSUSB_UWK_V1_1 = 101, /* specific revision 1.01 */ >> SSUSB_UWK_V1_2, /* specific revision 1.02 */ >> + SSUSB_UWK_V1_3, /* mt8195 IP0 */ >> + SSUSB_UWK_V1_5 = 105, /* mt8195 IP2 */ >> + SSUSB_UWK_V1_6, /* mt8195 IP3 */ >> }; >> >> /* >> @@ -70,6 +85,21 @@ static void ssusb_wakeup_ip_sleep_set(struct >> ssusb_mtk *ssusb, bool enable) >> msk = WC0_SSUSB0_CDEN | WC0_IS_SPM_EN; >> val = enable ? msk : 0; >> break; >> + case SSUSB_UWK_V1_3: >> + reg = ssusb->uwk_reg_base + PERI_WK_CTRL1_8195; >> + msk = WC1_IS_EN_P0_95 | WC1_IS_C_95(0xf) | WC1_IS_P_95; >> + val = enable ? (WC1_IS_EN_P0_95 | WC1_IS_C_95(0x1)) : >> 0; >> + break; >> + case SSUSB_UWK_V1_5: >> + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8195; >> + msk = WC0_IS_EN_P2_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; >> + val = enable ? (WC0_IS_EN_P2_95 | WC0_IS_C_95(0x1)) : >> 0; >> + break; >> + case SSUSB_UWK_V1_6: >> + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8195; >> + msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; >> + val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : >> 0; >> + break; >> case SSUSB_UWK_V2: >> reg = ssusb->uwk_reg_base + PERI_SSUSB_SPM_CTRL; >> msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN; > > which project will use ip-sleep wakeup for mt8195? only use device > mode? > > As I know, when use upstream code to support dual-role mode on mt8195, > there is a bug caused by hw limitation; > > This is required because: 1. The device tree nodes for MT8195 were wrong (now they're correct), as in, there are three MTU3 controllers that must be described, as the device tree provides a description of the hardware, not a partial description of whatever one machine wants to use; and 2. When the description of the hardware in DT is correct, even if Chromebooks are declaring dr_mode = "host", the IP sleep must come from MTU3 - otherwise there will be issues when trying to enter system sleep (as the system will be woken up immediately after trying to go to suspend); and 3. Upstream does support the Genio 1200 EVK, and I'm also introducing a new board that is similar to that (Radxa NIO12L). Besides, which bug are you talking about? At least on Chromebooks, everything seems to be working just fine; maybe that's because, on Cherry, dr_mode is forced to host. Regards, Angelo
diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c index 9f2be22af844..7c657ea2dabd 100644 --- a/drivers/usb/mtu3/mtu3_host.c +++ b/drivers/usb/mtu3/mtu3_host.c @@ -34,6 +34,18 @@ #define WC0_SSUSB0_CDEN BIT(6) #define WC0_IS_SPM_EN BIT(1) +/* mt8195 */ +#define PERI_WK_CTRL0_8195 0x04 +#define WC0_IS_P_95 BIT(30) /* polarity */ +#define WC0_IS_C_95(x) ((u32)(((x) & 0x7) << 27)) +#define WC0_IS_EN_P3_95 BIT(26) +#define WC0_IS_EN_P2_95 BIT(25) + +#define PERI_WK_CTRL1_8195 0x20 +#define WC1_IS_C_95(x) ((u32)(((x) & 0xf) << 28)) +#define WC1_IS_P_95 BIT(12) +#define WC1_IS_EN_P0_95 BIT(6) + /* mt2712 etc */ #define PERI_SSUSB_SPM_CTRL 0x0 #define SSC_IP_SLEEP_EN BIT(4) @@ -44,6 +56,9 @@ enum ssusb_uwk_vers { SSUSB_UWK_V2, SSUSB_UWK_V1_1 = 101, /* specific revision 1.01 */ SSUSB_UWK_V1_2, /* specific revision 1.02 */ + SSUSB_UWK_V1_3, /* mt8195 IP0 */ + SSUSB_UWK_V1_5 = 105, /* mt8195 IP2 */ + SSUSB_UWK_V1_6, /* mt8195 IP3 */ }; /* @@ -70,6 +85,21 @@ static void ssusb_wakeup_ip_sleep_set(struct ssusb_mtk *ssusb, bool enable) msk = WC0_SSUSB0_CDEN | WC0_IS_SPM_EN; val = enable ? msk : 0; break; + case SSUSB_UWK_V1_3: + reg = ssusb->uwk_reg_base + PERI_WK_CTRL1_8195; + msk = WC1_IS_EN_P0_95 | WC1_IS_C_95(0xf) | WC1_IS_P_95; + val = enable ? (WC1_IS_EN_P0_95 | WC1_IS_C_95(0x1)) : 0; + break; + case SSUSB_UWK_V1_5: + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8195; + msk = WC0_IS_EN_P2_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; + val = enable ? (WC0_IS_EN_P2_95 | WC0_IS_C_95(0x1)) : 0; + break; + case SSUSB_UWK_V1_6: + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0_8195; + msk = WC0_IS_EN_P3_95 | WC0_IS_C_95(0x7) | WC0_IS_P_95; + val = enable ? (WC0_IS_EN_P3_95 | WC0_IS_C_95(0x1)) : 0; + break; case SSUSB_UWK_V2: reg = ssusb->uwk_reg_base + PERI_SSUSB_SPM_CTRL; msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;
Add support for the ip-sleep wakeup functionality on the three MTU3 controllers found on the MT8195 SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- Changes in v2: - Dropped unused definition for WC0_IS_EN_P1_95 drivers/usb/mtu3/mtu3_host.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)