From patchwork Fri Feb 16 03:58:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wesley Cheng X-Patchwork-Id: 13559504 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03B2F125C7; Fri, 16 Feb 2024 03:59:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708056001; cv=none; b=Ab3PMldxJsvatxU32EAfq/sH3f3eLU5dKDp5PX6zonHaeS3Q8VZEDs+KiY4GIiNhL39gMMwpZg01QKrdWVdK+jaLIxRMOhT2cfP3MFTXjhfdeMHoFWvu7odTlC2zfuWCa6cFPBUh82wJMr5mPBIrsRjx18BDl94XlZTrEqFgdoY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708056001; c=relaxed/simple; bh=Q0azqO8smR2ytMu3weoXnM89PU9zmbcakfCx8YwZljA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=h15Yloue8lewSi/wqmW6MwWD6VPeVTsbXEeIMHCKNxjVEWT3RVbB3zm13d8A4ODkHhLAvj8PPPYP9QXT/uDKwTqpf2xlVrE2Ale+8Q4KMR0M9o5PZ9jybmj+DFgJhShrmGJL3ssNhNekghaUJsbCBk3G6m77BbFGZ2GTffOZzUQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=hcxSfplu; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="hcxSfplu" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 41G3xb5o013120; Fri, 16 Feb 2024 03:59:37 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=Gy+PS3XEBBMHlI22Eexi npqIThFpnwa4fIcd0ySdoD0=; b=hcxSfpluBkbWMmBIlvcfOikyg0dBn+tuHsTA N8DJvCOnxNj9EUIjrF5nJmHwhGcAHcX41DFGicctCc+R9bCWGVfPyXaLJREBx+jh WjTZcF1NQVtBspISPoeV5/sbYgc6Xatxwk5eKi+7ajQgMyRRUhGVuH85zpKPnrj+ S+KQC6+oOwAKkxXDL41WcxzOCTF/MwlD8l2fDYT/Nh8q5b9KEFVmPANsf/3D3Jv9 NIi4ST3WaiYfYgqG440TE24EUTOV3kngN1Z1/nnY0I0K7U4rQB36cZyW8JrpOdd5 ZX/y+mnyk+OJ58isej/Snn1oF9azVeDy4Mi+JIXLnKq7K8KTxQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3wa03r80gc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Feb 2024 03:59:37 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 41G3xaqo024894 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Feb 2024 03:59:36 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 15 Feb 2024 19:59:36 -0800 From: Wesley Cheng To: , , , , , , , , , , , , , , CC: , , , , , , , Wesley Cheng Subject: [PATCH v16 13/50] xhci: export XHCI IMOD setting helper for interrupters Date: Thu, 15 Feb 2024 19:58:46 -0800 Message-ID: <20240216035923.23392-14-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240216035923.23392-1-quic_wcheng@quicinc.com> References: <20240216035923.23392-1-quic_wcheng@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: i_8J26aKQxqAtLY0s41WQeg0IC-cE5_H X-Proofpoint-GUID: i_8J26aKQxqAtLY0s41WQeg0IC-cE5_H X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-16_03,2024-02-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=732 lowpriorityscore=0 mlxscore=0 adultscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 phishscore=0 spamscore=0 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402160031 Utilize the xhci_set_interrupter_moderation() API to set the IMOD value for interrupters, so that secondary interrupts can also configure this parameter when clients request for it. Change-Id: I9b496db458832958c49fedea7c43b7b60d316702 Signed-off-by: Wesley Cheng --- drivers/usb/host/xhci.c | 3 ++- drivers/usb/host/xhci.h | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 834d8d160da4..d2ce1e1421e6 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -349,7 +349,7 @@ int xhci_disable_interrupter(struct xhci_interrupter *ir) EXPORT_SYMBOL_GPL(xhci_disable_interrupter); /* interrupt moderation interval imod_interval in nanoseconds */ -static int xhci_set_interrupter_moderation(struct xhci_interrupter *ir, +int xhci_set_interrupter_moderation(struct xhci_interrupter *ir, u32 imod_interval) { u32 imod; @@ -364,6 +364,7 @@ static int xhci_set_interrupter_moderation(struct xhci_interrupter *ir, return 0; } +EXPORT_SYMBOL_GPL(xhci_set_interrupter_moderation); static void compliance_mode_recovery(struct timer_list *t) { diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 9039f234cf52..77042df42b46 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1875,6 +1875,8 @@ int xhci_alloc_tt_info(struct xhci_hcd *xhci, struct usb_tt *tt, gfp_t mem_flags); int xhci_enable_interrupter(struct xhci_interrupter *ir); int xhci_disable_interrupter(struct xhci_interrupter *ir); +int xhci_set_interrupter_moderation(struct xhci_interrupter *ir, + u32 imod_interval); /* xHCI ring, segment, TRB, and TD functions */ dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg, union xhci_trb *trb);