[1/2] dt-bindings: usb: add hisilicon,hi3798mv200-dwc3

Commit Message

Yang Xiwen via B4 Relay Feb. 23, 2024, 5:17 p.m. UTC

From: Yang Xiwen <[e-mail]>

Document the DWC3 controller used by Hi3798MV200.

Signed-off-by: Yang Xiwen <[e-mail]>
---
 .../bindings/usb/hisilicon,hi3798mv200-dwc3.yaml   | 100 +++++++++++++++++++++
 1 file changed, 100 insertions(+)

Comments

Rob Herring (Arm) Feb. 23, 2024, 9:30 p.m. UTC | #1

On Sat, 24 Feb 2024 01:17:49 +0800, Yang Xiwen wrote:
> Document the DWC3 controller used by Hi3798MV200.
> 
> Signed-off-by: Yang Xiwen <[e-mail]>
> ---
>  .../bindings/usb/hisilicon,hi3798mv200-dwc3.yaml   | 100 +++++++++++++++++++++
>  1 file changed, 100 insertions(+)
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Error: Documentation/devicetree/bindings/usb/hisilicon,hi3798mv200-dwc3.example.dts:34.32-33 syntax error
FATAL ERROR: Unable to parse input tree
make[2]: *** [scripts/Makefile.lib:419: Documentation/devicetree/bindings/usb/hisilicon,hi3798mv200-dwc3.example.dtb] Error 1
make[2]: *** Waiting for unfinished jobs....
make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1428: dt_binding_check] Error 2
make: *** [Makefile:240: __sub-make] Error 2

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[e-mail]

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Patch

diff --git a/Documentation/devicetree/bindings/usb/hisilicon,hi3798mv200-dwc3.yaml b/Documentation/devicetree/bindings/usb/hisilicon,hi3798mv200-dwc3.yaml
new file mode 100644
index 000000000000..0884d1ba6723
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/hisilicon,hi3798mv200-dwc3.yaml
@@ -0,0 +1,100 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/hisilicon,hi3798mv200-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HiSilicon Hi3798MV200 DWC3 USB SoC controller
+
+maintainers:
+  - Yang Xiwen <[e-mail]>
+
+properties:
+  compatible:
+    const: hisilicon,hi3798mv200-dwc3
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+  ranges: true
+
+  clocks:
+    items:
+      - description: Controller bus clock
+      - description: Controller suspend clock
+      - description: Controller reference clock
+      - description: Controller gm clock
+      - description: Controller gs clock
+      - description: Controller utmi clock
+      - description: Controller pipe clock
+
+  clock-names:
+    items:
+      - const: bus
+      - const: suspend
+      - const: ref
+      - const: gm
+      - const: gs
+      - const: utmi
+      - const: pipe
+
+  resets:
+    maxItems: 1
+
+  reset-names:
+    const: soft
+
+patternProperties:
+  '^usb@[0-9a-z]+$':
+    $ref: snps,dwc3.yaml#
+
+additionalProperties: false
+
+required:
+  - compatible
+  - '#address-cells'
+  - '#size-cells'
+  - ranges
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+
+examples:
+  - |
+    #include <dt-bindings/clock/histb-clock.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    usb@98a0000 {
+            compatible = "hisilicon,hi3798mv200-dwc3";
+            #address-cells = <1>;
+            #size-cells = <1>;
+            ranges;
+            clocks = <&crg HISTB_USB3_BUS_CLK>,
+                     <&crg HISTB_USB3_SUSPEND_CLK>,
+                     <&crg HISTB_USB3_REF_CLK>,
+                     <&crg HISTB_USB3_GM_CLK>,
+                     <&crg HISTB_USB3_GS_CLK>,
+                     <&crg HISTB_USB3_UTMI_CLK>,
+                     <&crg HISTB_USB3_PIPE_CLK>;
+            clock-names = "bus", "suspend", "ref", "gm", "gs", "utmi", "pipe";
+            resets = <&crg 0xb0 12>;
+            reset-names = "soft";
+
+            usb@98a0000 {
+                    compatible = "snps,dwc3";
+                    reg = <0x98a0000 0x10000>;
+                    interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+                    clocks = <&crg HISTB_USB3_BUS_CLK>,
+                             <&crg HISTB_USB3_SUSPEND_CLK>,
+                             <&crg HISTB_USB3_REF_CLK>;
+                    clock-names = "bus_early", "suspend", "ref";
+                    phys = <&usb2_phy1_port2>, <&combphy0 0>;
+                    phy-names = "usb2-phy", "usb3-phy";
+                    maximum-speed = "super-speed";
+                    dr_mode = "host";
+            };
+    };