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Tue, 5 Mar 2024 08:11:26 -0800 From: Wayne Chang To: , , , , , , CC: , , , Subject: [PATCH 1/2] phy: tegra: xusb: Add API to retrieve the port number of phy Date: Wed, 6 Mar 2024 00:11:21 +0800 Message-ID: <20240305161122.1254099-2-waynec@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240305161122.1254099-1-waynec@nvidia.com> References: <20240305161122.1254099-1-waynec@nvidia.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF0000150B:EE_|MN0PR12MB5955:EE_ X-MS-Office365-Filtering-Correlation-Id: b6c22762-6409-4b92-5379-08dc3d2ef0c6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7rE4cPRhM3XRq/lIKGXrFhbYpVxZTH3ufDZsJ6WfROiQjlqwnKLZVfK6dXo33tehhrHHIeUVNOpImmDd57TjJYLMdPZvF5/1NypbclzxD0VRd1tFA2n1OuSUC2i0bIcOd//MM7xTlbpR38EtiIocOsxpV7f0g75cjX9Jik9UEL6Mk6f+xE0USLdPtgHLD7SFY4afMFbm4ePI5s6Q0fBm9g5AclyiclzOmzIE6ccsZAHUCkd1Kp+9rAkpXvxDEcdWFUqWaCAfgkOStGeVssU2FX0hUE3IB2LD/zKcXzyZZEQF9BpLokLPTKPHWVwvpkqZXHVFgqPUHrNNoE3ImdkViwLOpXMUSWEajZGxcol7kLfJTUwGQf8AFn1kN9GFLMh8x4GkeO+JggdpCt26/RnsUOPA/BnN7lm5bgTOWUShEXlBvXin0/t/oRVAvLyV99BtdPfFZMJm8WqJItvBju6tmBKI7pxJD2Ok5f9S19ECL7B8WEz6dHVWshR8ihW1kJ6Uh2H0vioGCayAnVUB1oooHbOiqwVczZkpZj5f7/3faDLN1njH5qQ5FfjwxFlWZAISpPrkSaPBMIk5zMQWIc8jv23vnttckKbC5cvC5uggzAC9t9H/KGhxffM3ISKjSyujjCsO5x7E/JBuA8Ff68DsWwmjZna8P8i3W/qccuQmuxxCJ6ZMzplva8G0GnjuRN9voTV2ebsMbkW4v0My1qMlbGhKMOWdKb37q8vAdEFCEuxZz5qLCu6G54Kbx3u2cQVa X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230031)(36860700004)(376005)(82310400014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Mar 2024 16:11:39.5993 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b6c22762-6409-4b92-5379-08dc3d2ef0c6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF0000150B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5955 This patch introduces a new API, tegra_xusb_padctl_get_port_number, to the Tegra XUSB Pad Controller driver. This API is used to identify the USB port that is associated with a given PHY. The function takes a PHY pointer for either a USB2 PHY or USB3 PHY as input and returns the corresponding port number. If the PHY pointer is invalid, it returns -ENODEV. Signed-off-by: Wayne Chang --- drivers/phy/tegra/xusb.c | 13 +++++++++++++ include/linux/phy/tegra/xusb.h | 1 + 2 files changed, 14 insertions(+) diff --git a/drivers/phy/tegra/xusb.c b/drivers/phy/tegra/xusb.c index 142ebe0247cc..983a6e6173bd 100644 --- a/drivers/phy/tegra/xusb.c +++ b/drivers/phy/tegra/xusb.c @@ -1531,6 +1531,19 @@ int tegra_xusb_padctl_get_usb3_companion(struct tegra_xusb_padctl *padctl, } EXPORT_SYMBOL_GPL(tegra_xusb_padctl_get_usb3_companion); +int tegra_xusb_padctl_get_port_number(struct phy *phy) +{ + struct tegra_xusb_lane *lane; + + if (!phy) + return -ENODEV; + + lane = phy_get_drvdata(phy); + + return lane->index; +} +EXPORT_SYMBOL_GPL(tegra_xusb_padctl_get_port_number); + MODULE_AUTHOR("Thierry Reding "); MODULE_DESCRIPTION("Tegra XUSB Pad Controller driver"); MODULE_LICENSE("GPL v2"); diff --git a/include/linux/phy/tegra/xusb.h b/include/linux/phy/tegra/xusb.h index 70998e6dd6fd..6ca51e0080ec 100644 --- a/include/linux/phy/tegra/xusb.h +++ b/include/linux/phy/tegra/xusb.h @@ -26,6 +26,7 @@ void tegra_phy_xusb_utmi_pad_power_down(struct phy *phy); int tegra_phy_xusb_utmi_port_reset(struct phy *phy); int tegra_xusb_padctl_get_usb3_companion(struct tegra_xusb_padctl *padctl, unsigned int port); +int tegra_xusb_padctl_get_port_number(struct phy *phy); int tegra_xusb_padctl_enable_phy_sleepwalk(struct tegra_xusb_padctl *padctl, struct phy *phy, enum usb_device_speed speed); int tegra_xusb_padctl_disable_phy_sleepwalk(struct tegra_xusb_padctl *padctl, struct phy *phy);