diff mbox series

[v16,9/9] usb: dwc3: qcom: Add multiport suspend/resume support for wrapper

Message ID 20240307062052.2319851-10-quic_kriskura@quicinc.com (mailing list archive)
State Superseded
Headers show
Series Add multiport support for DWC3 controllers | expand

Commit Message

Krishna Kurapati PSSNV March 7, 2024, 6:20 a.m. UTC
Power event IRQ is used for wakeup in cases:
a) where the controller is super speed capable and missing an
ss_phy interrupt.
b) where the GIC is not capable of detecting DP/DM hs phy irq's.

Power event IRQ stat register indicates whether high speed phy
entered and exited L2 successfully during suspend and resume.
Indicate the same for all ports of multiport.

Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
---
 drivers/usb/dwc3/dwc3-qcom.c | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

Comments

Johan Hovold March 25, 2024, 12:52 p.m. UTC | #1
On Thu, Mar 07, 2024 at 11:50:52AM +0530, Krishna Kurapati wrote:
> Power event IRQ is used for wakeup in cases:
> a) where the controller is super speed capable and missing an
> ss_phy interrupt.
> b) where the GIC is not capable of detecting DP/DM hs phy irq's.
> 
> Power event IRQ stat register indicates whether high speed phy
> entered and exited L2 successfully during suspend and resume.
> Indicate the same for all ports of multiport.
> 
> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>

> @@ -471,9 +480,12 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup)
>  	if (ret)
>  		dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret);
>  
> +	for (i = 0; i < qcom->num_ports; i++) {
>  	/* Clear existing events from PHY related to L2 in/out */

This comment either needs to be moved above the for-loop or be indented
one level in.

> -	dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG,
> -			  PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
> +		dwc3_qcom_setbits(qcom->qscratch_base,
> +				  pwr_evnt_irq_stat_reg[i],
> +				  PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
> +	}
>  
>  	qcom->is_suspended = false;

With the above fixed:

Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Krishna Kurapati PSSNV March 25, 2024, 1:15 p.m. UTC | #2
On 3/25/2024 6:22 PM, Johan Hovold wrote:
> On Thu, Mar 07, 2024 at 11:50:52AM +0530, Krishna Kurapati wrote:
>> Power event IRQ is used for wakeup in cases:
>> a) where the controller is super speed capable and missing an
>> ss_phy interrupt.
>> b) where the GIC is not capable of detecting DP/DM hs phy irq's.
>>
>> Power event IRQ stat register indicates whether high speed phy
>> entered and exited L2 successfully during suspend and resume.
>> Indicate the same for all ports of multiport.
>>
>> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
> 
>> @@ -471,9 +480,12 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup)
>>   	if (ret)
>>   		dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret);
>>   
>> +	for (i = 0; i < qcom->num_ports; i++) {
>>   	/* Clear existing events from PHY related to L2 in/out */
> 
> This comment either needs to be moved above the for-loop or be indented
> one level in.

Ah yes, missed it.
Will move it out of the loop.

> 
>> -	dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG,
>> -			  PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
>> +		dwc3_qcom_setbits(qcom->qscratch_base,
>> +				  pwr_evnt_irq_stat_reg[i],
>> +				  PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
>> +	}
>>   
>>   	qcom->is_suspended = false;
> 
> With the above fixed:
> 
> Reviewed-by: Johan Hovold <johan+linaro@kernel.org>

Thanks for the review.

Regards,
Krishna,
diff mbox series

Patch

diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index c0a6de50ec09..365f01a6b581 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -52,6 +52,13 @@ 
 #define APPS_USB_AVG_BW 0
 #define APPS_USB_PEAK_BW MBps_to_icc(40)
 
+static const u32 pwr_evnt_irq_stat_reg[DWC3_MAX_PORTS] = {
+	0x58,
+	0x1dc,
+	0x228,
+	0x238,
+};
+
 struct dwc3_qcom_port {
 	int			qusb2_phy_irq;
 	int			dp_hs_phy_irq;
@@ -421,9 +428,11 @@  static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup)
 	if (qcom->is_suspended)
 		return 0;
 
-	val = readl(qcom->qscratch_base + PWR_EVNT_IRQ_STAT_REG);
-	if (!(val & PWR_EVNT_LPM_IN_L2_MASK))
-		dev_err(qcom->dev, "HS-PHY not in L2\n");
+	for (i = 0; i < qcom->num_ports; i++) {
+		val = readl(qcom->qscratch_base + pwr_evnt_irq_stat_reg[i]);
+		if (!(val & PWR_EVNT_LPM_IN_L2_MASK))
+			dev_err(qcom->dev, "port-%d HS-PHY not in L2\n", i + 1);
+	}
 
 	for (i = qcom->num_clocks - 1; i >= 0; i--)
 		clk_disable_unprepare(qcom->clks[i]);
@@ -471,9 +480,12 @@  static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup)
 	if (ret)
 		dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret);
 
+	for (i = 0; i < qcom->num_ports; i++) {
 	/* Clear existing events from PHY related to L2 in/out */
-	dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG,
-			  PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
+		dwc3_qcom_setbits(qcom->qscratch_base,
+				  pwr_evnt_irq_stat_reg[i],
+				  PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
+	}
 
 	qcom->is_suspended = false;