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[34.125.73.210]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-20568d21dd4sm2338785ad.155.2024.08.31.21.07.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 31 Aug 2024 21:07:34 -0700 (PDT) From: Stephen Boyd To: chrome-platform@lists.linux.dev Cc: linux-kernel@vger.kernel.org, patches@lists.linux.dev, devicetree@vger.kernel.org, Douglas Anderson , Pin-yen Lin , Andrzej Hajda , Benson Leung , Conor Dooley , Daniel Vetter , David Airlie , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, Guenter Roeck , Jernej Skrabec , Jonas Karlman , Krzysztof Kozlowski , Laurent Pinchart , Lee Jones , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Prashant Malani , Robert Foss , Rob Herring , Thomas Zimmermann , Tzung-Bi Shih , Alexandre Belloni , Andy Shevchenko , Daniel Scally , Greg Kroah-Hartman , Heikki Krogerus , Ivan Orlov , linux-acpi@vger.kernel.org, linux-usb@vger.kernel.org, Mika Westerberg , "Rafael J . Wysocki" , Sakari Ailus , Vinod Koul , "Rob Herring (Arm)" Subject: [PATCH v4 15/18] dt-bindings: usb: Add ports to google,cros-ec-typec for DP altmode Date: Sat, 31 Aug 2024 21:06:53 -0700 Message-ID: <20240901040658.157425-16-swboyd@chromium.org> X-Mailer: git-send-email 2.46.0.469.g59c65b2a67-goog In-Reply-To: <20240901040658.157425-1-swboyd@chromium.org> References: <20240901040658.157425-1-swboyd@chromium.org> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a DT graph binding to google,cros-ec-typec so that it can combine DisplayPort (DP) and USB SuperSpeed (SS) data into a USB type-c endpoint that is connected to the usb-c-connector node's SS endpoint. This also allows us to connect the DP and USB nodes in the graph to the USB type-c connectors, providing the full picture of the USB type-c data flows in the system. Allow there to be multiple typec nodes underneath the EC node so that one DT graph exists per DP bridge. The EC is actually controlling TCPCs and redrivers that combine the DP and USB signals together so this more accurately reflects the hardware design without introducing yet another DT node underneath the EC for USB type-c. If the type-c ports are being shared between a single DP controller then the ports need to know about each other and determine a policy to drive DP to one type-c port. If the type-c ports each have their own dedicated DP controller then they're able to operate independently and enter/exit DP altmode independently as well. We can't connect the DP controller's endpoint to one usb-c-connector port@1 endpoint and the USB controller's endpoint to another usb-c-connector port@1 endpoint either because the DP muxing case would have DP connected to two usb-c-connector endpoints which the graph binding doesn't support. Therefore, one typec node is required per the capabilities of the type-c port(s) being managed. This also lets us indicate which type-c ports the DP controller is wired to. For example, if DP was connected to ports 0 and 2, while port 1 was connected to another DP controller we wouldn't be able to implement that without having some other DT property to indicate which output ports are connected to the DP endpoint. Reviewed-by: Rob Herring (Arm) Cc: Krzysztof Kozlowski Cc: Conor Dooley Acked-by: Lee Jones Cc: Benson Leung Cc: Guenter Roeck Cc: Prashant Malani Cc: Tzung-Bi Shih Cc: Cc: Cc: Pin-yen Lin Signed-off-by: Stephen Boyd Acked-by: Lee Jones --- .../bindings/mfd/google,cros-ec.yaml | 7 +- .../bindings/usb/google,cros-ec-typec.yaml | 229 ++++++++++++++++++ 2 files changed, 233 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml index c991626dc22b..bbe28047d0c0 100644 --- a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml +++ b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml @@ -98,9 +98,6 @@ properties: gpio-controller: true - typec: - $ref: /schemas/usb/google,cros-ec-typec.yaml# - ec-pwm: $ref: /schemas/pwm/google,cros-ec-pwm.yaml# deprecated: true @@ -166,6 +163,10 @@ patternProperties: type: object $ref: /schemas/extcon/extcon-usbc-cros-ec.yaml# + "^typec(-[0-9])*$": + type: object + $ref: /schemas/usb/google,cros-ec-typec.yaml# + required: - compatible diff --git a/Documentation/devicetree/bindings/usb/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/usb/google,cros-ec-typec.yaml index 365523a63179..235b86da3cdd 100644 --- a/Documentation/devicetree/bindings/usb/google,cros-ec-typec.yaml +++ b/Documentation/devicetree/bindings/usb/google,cros-ec-typec.yaml @@ -26,6 +26,106 @@ properties: '#size-cells': const: 0 + mux-gpios: + description: GPIOs indicating which way the DP mux is steered + maxItems: 1 + + no-hpd: + description: Indicates this endpoint doesn't signal HPD for DisplayPort + type: boolean + + mode-switch: + $ref: usb-switch.yaml#properties/mode-switch + + orientation-switch: + $ref: usb-switch.yaml#properties/orientation-switch + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: Output ports for combined DP and USB SS data + patternProperties: + "^endpoint@([0-8])$": + $ref: usb-switch.yaml#/$defs/usbc-out-endpoint + unevaluatedProperties: false + + anyOf: + - required: + - endpoint@0 + - required: + - endpoint@1 + - required: + - endpoint@2 + - required: + - endpoint@3 + - required: + - endpoint@4 + - required: + - endpoint@5 + - required: + - endpoint@6 + - required: + - endpoint@7 + - required: + - endpoint@8 + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port to receive USB SuperSpeed (SS) data + patternProperties: + "^endpoint@([0-8])$": + $ref: usb-switch.yaml#/$defs/usbc-in-endpoint + unevaluatedProperties: false + + anyOf: + - required: + - endpoint@0 + - required: + - endpoint@1 + - required: + - endpoint@2 + - required: + - endpoint@3 + - required: + - endpoint@4 + - required: + - endpoint@5 + - required: + - endpoint@6 + - required: + - endpoint@7 + - required: + - endpoint@8 + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + description: + Input port to receive DisplayPort (DP) data + unevaluatedProperties: false + + properties: + endpoint: + $ref: usb-switch.yaml#/$defs/dp-endpoint + unevaluatedProperties: false + + required: + - endpoint + + required: + - port@0 + + anyOf: + - required: + - port@1 + - required: + - port@2 + patternProperties: '^connector@[0-9a-f]+$': $ref: /schemas/connector/usb-connector.yaml# @@ -35,6 +135,40 @@ patternProperties: required: - compatible +allOf: + - if: + required: + - no-hpd + then: + properties: + ports: + required: + - port@2 + - if: + required: + - mux-gpios + then: + properties: + ports: + required: + - port@2 + - if: + required: + - orientation-switch + then: + properties: + ports: + required: + - port@2 + - if: + required: + - mode-switch + then: + properties: + ports: + required: + - port@2 + additionalProperties: false examples: @@ -50,6 +184,8 @@ examples: typec { compatible = "google,cros-ec-typec"; + orientation-switch; + mode-switch; #address-cells = <1>; #size-cells = <0>; @@ -60,6 +196,99 @@ examples: power-role = "dual"; data-role = "dual"; try-power-role = "source"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb_c0_hs: endpoint { + remote-endpoint = <&usb_hub_dfp3_hs>; + }; + }; + + port@1 { + reg = <1>; + usb_c0_ss: endpoint { + remote-endpoint = <&cros_typec_c0_ss>; + }; + }; + }; + }; + + connector@1 { + compatible = "usb-c-connector"; + reg = <1>; + power-role = "dual"; + data-role = "dual"; + try-power-role = "source"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usb_c1_hs: endpoint { + remote-endpoint = <&usb_hub_dfp2_hs>; + }; + }; + + port@1 { + reg = <1>; + usb_c1_ss: endpoint { + remote-endpoint = <&cros_typec_c1_ss>; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + cros_typec_c0_ss: endpoint@0 { + reg = <0>; + remote-endpoint = <&usb_c0_ss>; + data-lanes = <0 1 2 3>; + }; + + cros_typec_c1_ss: endpoint@1 { + reg = <1>; + remote-endpoint = <&usb_c1_ss>; + data-lanes = <2 3 0 1>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + usb_in_0: endpoint@0 { + reg = <0>; + remote-endpoint = <&usb_ss_0_out>; + }; + + usb_in_1: endpoint@1 { + reg = <1>; + remote-endpoint = <&usb_ss_1_out>; + }; + }; + + port@2 { + reg = <2>; + dp_in: endpoint { + remote-endpoint = <&dp_phy>; + data-lanes = <0 1>; + }; + }; }; }; };