| Message ID | 20241112091355.2028018-3-quic_varada@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Enable IPQ5424 USB support | expand |
On Tue, Nov 12, 2024 at 02:43:51PM +0530, Varadarajan Narayanan wrote: > Add the phy init sequence for the Super Speed ports found > on IPQ5424. > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> > --- > drivers/phy/qualcomm/phy-qcom-qusb2.c | 28 +++++++++++++++++++++++++++ > 1 file changed, 28 insertions(+) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c > index c52655a383ce..4513f0c81c50 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c > +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c > @@ -151,6 +151,21 @@ static const struct qusb2_phy_init_tbl ipq6018_init_tbl[] = { > QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_AUTOPGM_CTL1, 0x9F), > }; > > +static const struct qusb2_phy_init_tbl ipq5424_init_tbl[] = { > + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL, 0x14), > + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0x00), > + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0x53), > + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0xC3), > + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_TUNE, 0x30), > + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL1, 0x79), > + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL2, 0x21), > + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE5, 0x00), > + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_PWR_CTRL, 0x00), > + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TEST2, 0x14), > + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_TEST, 0x80), > + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_AUTOPGM_CTL1, 0x9F), Lowercase hex numbers please. LGTM otherwise. > +}; > + > static const unsigned int ipq6018_regs_layout[] = { > [QUSB2PHY_PLL_STATUS] = 0x38, > [QUSB2PHY_PORT_TUNE1] = 0x80, > @@ -331,6 +346,16 @@ static const struct qusb2_phy_cfg ipq6018_phy_cfg = { > .autoresume_en = BIT(0), > }; > > +static const struct qusb2_phy_cfg ipq5424_phy_cfg = { > + .tbl = ipq5424_init_tbl, > + .tbl_num = ARRAY_SIZE(ipq5424_init_tbl), > + .regs = ipq6018_regs_layout, > + > + .disable_ctrl = POWER_DOWN, > + .mask_core_ready = PLL_LOCKED, > + .autoresume_en = BIT(0), > +}; > + > static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = { > .tbl = qusb2_v2_init_tbl, > .tbl_num = ARRAY_SIZE(qusb2_v2_init_tbl), > @@ -905,6 +930,9 @@ static const struct phy_ops qusb2_phy_gen_ops = { > > static const struct of_device_id qusb2_phy_of_match_table[] = { > { > + .compatible = "qcom,ipq5424-qusb2-phy", > + .data = &ipq5424_phy_cfg, > + }, { > .compatible = "qcom,ipq6018-qusb2-phy", > .data = &ipq6018_phy_cfg, > }, { > -- > 2.34.1 >
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c index c52655a383ce..4513f0c81c50 100644 --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c @@ -151,6 +151,21 @@ static const struct qusb2_phy_init_tbl ipq6018_init_tbl[] = { QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_AUTOPGM_CTL1, 0x9F), }; +static const struct qusb2_phy_init_tbl ipq5424_init_tbl[] = { + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL, 0x14), + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0x00), + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0x53), + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0xC3), + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_TUNE, 0x30), + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL1, 0x79), + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL2, 0x21), + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE5, 0x00), + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_PWR_CTRL, 0x00), + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TEST2, 0x14), + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_TEST, 0x80), + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_AUTOPGM_CTL1, 0x9F), +}; + static const unsigned int ipq6018_regs_layout[] = { [QUSB2PHY_PLL_STATUS] = 0x38, [QUSB2PHY_PORT_TUNE1] = 0x80, @@ -331,6 +346,16 @@ static const struct qusb2_phy_cfg ipq6018_phy_cfg = { .autoresume_en = BIT(0), }; +static const struct qusb2_phy_cfg ipq5424_phy_cfg = { + .tbl = ipq5424_init_tbl, + .tbl_num = ARRAY_SIZE(ipq5424_init_tbl), + .regs = ipq6018_regs_layout, + + .disable_ctrl = POWER_DOWN, + .mask_core_ready = PLL_LOCKED, + .autoresume_en = BIT(0), +}; + static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = { .tbl = qusb2_v2_init_tbl, .tbl_num = ARRAY_SIZE(qusb2_v2_init_tbl), @@ -905,6 +930,9 @@ static const struct phy_ops qusb2_phy_gen_ops = { static const struct of_device_id qusb2_phy_of_match_table[] = { { + .compatible = "qcom,ipq5424-qusb2-phy", + .data = &ipq5424_phy_cfg, + }, { .compatible = "qcom,ipq6018-qusb2-phy", .data = &ipq6018_phy_cfg, }, {
Add the phy init sequence for the Super Speed ports found on IPQ5424. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 28 +++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)