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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-5f882756603sm4001750eaf.29.2025.01.13.21.05.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jan 2025 21:05:48 -0800 (PST) From: Bjorn Andersson Date: Mon, 13 Jan 2025 21:11:38 -0800 Subject: [PATCH v3 05/12] of: overlays: dwc3-flattening: Add Qualcomm Arm32 overlays Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250113-dwc3-refactor-v3-5-d1722075df7b@oss.qualcomm.com> References: <20250113-dwc3-refactor-v3-0-d1722075df7b@oss.qualcomm.com> In-Reply-To: <20250113-dwc3-refactor-v3-0-d1722075df7b@oss.qualcomm.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Felipe Balbi , Wesley Cheng , Saravana Kannan , Thinh Nguyen , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Frank Li Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=11881; i=bjorn.andersson@oss.qualcomm.com; h=from:subject:message-id; bh=HNcOKVWgkynOsQsZmCyiwG5aufCrKz7qvDtrRc11G98=; b=owEBgwJ8/ZANAwAIAQsfOT8Nma3FAcsmYgBnhfIVp/QB6yC+BHC8j5GvacF7Nvn4ICJDkLLPX SflYtgeR+uJAkkEAAEIADMWIQQF3gPMXzXqTwlm1SULHzk/DZmtxQUCZ4XyFRUcYW5kZXJzc29u QGtlcm5lbC5vcmcACgkQCx85Pw2ZrcWiKw//Uhyzkd0STQcAAV7kT2fVl8Ewe5JoqcRo2br2TSJ w/xkWDpBVSi/pK2QuDnIxyjr/KtBuQZ6v7BWLUE/7k89Qc63Rsq5nTA9A8/uiy6GOWRCEeVamJW H3tOVGe6UCFBESasOjQHOkzo0S/QpQll5949WkXbkqCoM+VOPyMTOnbKXRkddZvKcdstK5MLwsz 0p9xD8bjyte+UnpmlDMWzIr3XJQEB9wC1Ys59RaJVdsQvyGFcqgKeEvYYDNYLtUXzksem94oj/O ob/JL1cZFRPa5m8vkGMJnlAXo2IhLgNZsXnklN1QuPIRVTM8qhNYXeGlFC5cP8lj/G7+LGLOVJb c8RRys3eJt9n6YCDur77w4pT4ag88GikuYXHpi4XoB0jC/ewSXdgF1i09lPrLlombwPHIl8x/BJ m2tvOTittEJsP3wTZMSB0cWWawuWxqbpO0v36nXwARevtdG2YFJsRcMCbEAWZ06+55ehf6PrNFA 5yftg+n7WpaihzfysZrdOvph6sg1Osfk2GizSIgsqRSLscZmdE+kvnM6bp9Xl5ZW/mieUtGRNKs DMLNIiv64CxwqdCgLnF+xssYWOxBar9wcununXf/j3dERIyrTMcLZ0JICUeIiTS2AgT5IUdK6UE JhaeNghARkVTq6p7B9yMrxpYcOHDu1ADcSWhwd3Jw9nE= X-Developer-Key: i=bjorn.andersson@oss.qualcomm.com; a=openpgp; fpr=05DE03CC5F35EA4F0966D5250B1F393F0D99ADC5 X-Proofpoint-ORIG-GUID: _BtJd6IuHTbecVeTYh-6SGQkp9XBZo5b X-Proofpoint-GUID: _BtJd6IuHTbecVeTYh-6SGQkp9XBZo5b X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 suspectscore=0 malwarescore=0 mlxlogscore=999 phishscore=0 clxscore=1011 spamscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501140039 Introduce the overlays necessary for migrating Qualcomm Arm32 boards currently present in the upstream Linux kernel. Signed-off-by: Bjorn Andersson --- drivers/of/overlays/dwc3-flattening/Makefile | 6 ++++ .../of/overlays/dwc3-flattening/dwc3-flattening.c | 42 ++++++++++++++++++++++ .../of/overlays/dwc3-flattening/dwc3-flattening.h | 13 +++++++ .../overlays/dwc3-flattening/dwc3-qcom_ipq4018.dts | 36 +++++++++++++++++++ .../dwc3-qcom_ipq4018_8dev_jalapeno.dts | 38 ++++++++++++++++++++ .../overlays/dwc3-flattening/dwc3-qcom_ipq4019.dts | 38 ++++++++++++++++++++ .../overlays/dwc3-flattening/dwc3-qcom_ipq8064.dts | 40 +++++++++++++++++++++ .../overlays/dwc3-flattening/dwc3-qcom_sdx55.dts | 38 ++++++++++++++++++++ .../overlays/dwc3-flattening/dwc3-qcom_sdx65.dts | 38 ++++++++++++++++++++ 9 files changed, 289 insertions(+) diff --git a/drivers/of/overlays/dwc3-flattening/Makefile b/drivers/of/overlays/dwc3-flattening/Makefile index 78ed59517887..248ddabd424e 100644 --- a/drivers/of/overlays/dwc3-flattening/Makefile +++ b/drivers/of/overlays/dwc3-flattening/Makefile @@ -2,3 +2,9 @@ obj-$(CONFIG_OF_OVERLAYS_DWC3_FLATTENING) += dwc3-flattening-overlay.o dwc3-flattening-overlay-y += dwc3-flattening.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq4018.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq4018_8dev_jalapeno.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq4019.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_ipq8064.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdx55.dtb.o +dwc3-flattening-overlay-y += dwc3-qcom_sdx65.dtb.o diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c index fe8e42627fe3..0a3a31c5088b 100644 --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.c @@ -21,7 +21,49 @@ struct dwc3_overlay_data { const char *migrate_match; }; +static const struct dwc3_overlay_data dwc3_qcom_ipq4018_overlay = { + .fdt = __dtb_dwc3_qcom_ipq4018_begin, + .end = __dtb_dwc3_qcom_ipq4018_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_ipq4018_8dev_jalapeno_overlay = { + .fdt = __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_begin, + .end = __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_ipq4019_overlay = { + .fdt = __dtb_dwc3_qcom_ipq4019_begin, + .end = __dtb_dwc3_qcom_ipq4019_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_ipq8064_overlay = { + .fdt = __dtb_dwc3_qcom_ipq8064_begin, + .end = __dtb_dwc3_qcom_ipq8064_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdx55_overlay = { + .fdt = __dtb_dwc3_qcom_sdx55_begin, + .end = __dtb_dwc3_qcom_sdx55_end, + .migrate_match = "qcom,dwc3", +}; + +static const struct dwc3_overlay_data dwc3_qcom_sdx65_overlay = { + .fdt = __dtb_dwc3_qcom_sdx65_begin, + .end = __dtb_dwc3_qcom_sdx65_end, + .migrate_match = "qcom,dwc3", +}; + static const struct of_device_id dwc3_flatten_of_match[] = { + { .compatible = "8dev,jalapeno", .data = &dwc3_qcom_ipq4018_8dev_jalapeno_overlay }, + { .compatible = "qcom,ipq4018", .data = &dwc3_qcom_ipq4018_overlay }, + { .compatible = "qcom,ipq4019", .data = &dwc3_qcom_ipq4019_overlay }, + { .compatible = "qcom,ipq8064", .data = &dwc3_qcom_ipq8064_overlay }, + { .compatible = "qcom,sdx55", .data = &dwc3_qcom_sdx55_overlay }, + { .compatible = "qcom,sdx65", .data = &dwc3_qcom_sdx65_overlay }, {} }; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h index 6147376d3c92..57d7dbc94980 100644 --- a/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h +++ b/drivers/of/overlays/dwc3-flattening/dwc3-flattening.h @@ -4,4 +4,17 @@ #include +extern u8 __dtb_dwc3_qcom_ipq4018_begin[]; +extern u8 __dtb_dwc3_qcom_ipq4018_end[]; +extern u8 __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_begin[]; +extern u8 __dtb_dwc3_qcom_ipq4018_8dev_jalapeno_end[]; +extern u8 __dtb_dwc3_qcom_ipq4019_begin[]; +extern u8 __dtb_dwc3_qcom_ipq4019_end[]; +extern u8 __dtb_dwc3_qcom_ipq8064_begin[]; +extern u8 __dtb_dwc3_qcom_ipq8064_end[]; +extern u8 __dtb_dwc3_qcom_sdx55_begin[]; +extern u8 __dtb_dwc3_qcom_sdx55_end[]; +extern u8 __dtb_dwc3_qcom_sdx65_begin[]; +extern u8 __dtb_dwc3_qcom_sdx65_end[]; + #endif diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018.dts new file mode 100644 index 000000000000..1bd86a1852ba --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include + +/ { + fragment@0 { + target-path = "/soc/usb@8af8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x08a00000 0xf8100>; + phys = <&usb3_hs_phy>; + phy-names = "usb2-phy"; + }; + }; + + fragment@1 { + target-path = "/soc/usb@60f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x06000000 0xf8100>; + phys = <&usb2_hs_phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018_8dev_jalapeno.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018_8dev_jalapeno.dts new file mode 100644 index 000000000000..bdc76b73c1fe --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4018_8dev_jalapeno.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include + +/ { + fragment@0 { + target-path = "/soc/usb@8af8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x08a00000 0xf8100>; + phys = <&usb3_hs_phy>, + <&usb3_ss_phy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc/usb@60f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x06000000 0xf8100>; + phys = <&usb2_hs_phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4019.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4019.dts new file mode 100644 index 000000000000..bdc76b73c1fe --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq4019.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include + +/ { + fragment@0 { + target-path = "/soc/usb@8af8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x08a00000 0xf8100>; + phys = <&usb3_hs_phy>, + <&usb3_ss_phy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc/usb@60f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq4019-dwc3", "qcom,snps-dwc3"; + reg = <0x06000000 0xf8100>; + phys = <&usb2_hs_phy>; + phy-names = "usb2-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8064.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8064.dts new file mode 100644 index 000000000000..8e29a17472c6 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_ipq8064.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include + +/ { + fragment@0 { + target-path = "/soc/usb@100f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq8064-dwc3", "qcom,snps-dwc3"; + reg = <0x10000000 0x14d00>; + phys = <&hs_phy_0>, + <&ss_phy_0>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; + + fragment@1 { + target-path = "/soc/usb@110f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,ipq8064-dwc3", "qcom,snps-dwc3"; + reg = <0x11000000 0x14d00>; + phys = <&hs_phy_1>, + <&ss_phy_1>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx55.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx55.dts new file mode 100644 index 000000000000..9ebb5d42f355 --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx55.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include + +/ { + fragment@0 { + target-path = "/soc/usb@a6f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,sdx55-dwc3", "qcom,snps-dwc3"; + reg = <0x0a600000 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc 51 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x1a0 0x0>; + phys = <&usb_hsphy>, + <&usb_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +}; diff --git a/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx65.dts b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx65.dts new file mode 100644 index 000000000000..239caec1f80d --- /dev/null +++ b/drivers/of/overlays/dwc3-flattening/dwc3-qcom_sdx65.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include + +/ { + fragment@0 { + target-path = "/soc/usb@a6f8800"; + #address-cells = <1>; + #size-cells = <1>; + + __overlay__ { + compatible = "qcom,sdx65-dwc3", "qcom,snps-dwc3"; + reg = <0x0a600000 0xd100>; + interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 19 IRQ_TYPE_EDGE_BOTH>, + <&pdc 18 IRQ_TYPE_EDGE_BOTH>, + <&pdc 76 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + iommus = <&apps_smmu 0x1a0 0x0>; + phys = <&usb_hsphy>, + <&usb_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + }; + }; +};