diff mbox

usb/host/pci-quirks: Only reset USB bus on NVIDIA devices

Message ID Pine.LNX.4.44L0.1807021302210.1574-100000@iolanthe.rowland.org (mailing list archive)
State New, archived
Headers show

Commit Message

Alan Stern July 2, 2018, 5:19 p.m. UTC
On Mon, 2 Jul 2018, Alan Stern wrote:

> > >> The problem is, that currently 100 ms sleep is over 10 % of the overall
> > >> execution time of the Linux kernel here. So I really like to not sleep
> > >> if it’s not needed.
> > > 
> > > It would be nice to execute the probes in parallel; that would reduce
> > > the total delay to 50 ms.  However, that is the subject of a separate
> > > discussion.
> > > 
> > >>> Besides, doesn't it seem like a bad idea to reset the controller while
> > >>> leaving devices on the USB bus in whatever state they happened to be?
> > >>
> > >> Yes, it’s probably not optimal.
> > >>
> > >> I wonder if the reset is needed, if the firmware has already initialized
> > >> the device.
> > > 
> > > The devices on the bus need to be reset, because the OS has no idea of
> > > what they are and what the firmware has them doing.
> > > 
> > > For example, the firmware may have assigned bus address 2 to a
> > > keyboard.  But the OS can initialize the devices in a different order,
> > > and it might want to assign bus address 2 to a USB drive.  Then you'd
> > > have two devices trying to use the same address at the same time, which
> > > would not be a good thing.
> > 
> > Understood.
> > 
> > So, what would be a way forward? Add a whitelist for boards or chipsets
> > not needing the 50 ms delay?
> 
> The 50-ms delay isn't for the board or the chipset; it is for the USB 
> devices that are plugged into the controller.  It is required by the 
> USB spec, so we can't get rid of it.

I may have been too hasty.  The drivers for other types of USB host
controllers do not perform a USB bus reset during startup, so maybe
OHCI doesn't really need it either.

We still need to put the controller into the correct state, but what 
happens to the bus shouldn't matter.  This is because reinitializing 
the controller disables all its ports, and the only way to enable a 
port is by sending a reset signal through it.  So the attached devices 
will end up getting reset one way or another, even if we don't do it 
explicitly during the handoff.

Therefore in theory we should be okay without the 50-ms delay at all.  
And we might as well tell the controller to go into the USB_RESET even
if it already is in that state; testing the current state is more
effort than just doing setting it.  Something like the patch below
ought to work, although I wouldn't submit it for the -stable kernels
since it doesn't fix a real bug.

It's not clear why OHCI has both a USB_RESET state and a 
HostControllerReset command, especially since the command changes the 
state to USB_SUSPEND instead of USB_RESET.  This is just one of several 
odd things in the OHCI specification.

Alan Stern




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Comments

Paul Menzel July 3, 2018, 6:49 a.m. UTC | #1
Dear Alan,


Thank you very much for looking into this issue.

Am 02.07.2018 um 19:19 schrieb Alan Stern:
> On Mon, 2 Jul 2018, Alan Stern wrote:
> 
>>>>> The problem is, that currently 100 ms sleep is over 10 % of the overall
>>>>> execution time of the Linux kernel here. So I really like to not sleep
>>>>> if it’s not needed.
>>>>
>>>> It would be nice to execute the probes in parallel; that would reduce
>>>> the total delay to 50 ms.  However, that is the subject of a separate
>>>> discussion.
>>>>
>>>>>> Besides, doesn't it seem like a bad idea to reset the controller while
>>>>>> leaving devices on the USB bus in whatever state they happened to be?
>>>>>
>>>>> Yes, it’s probably not optimal.
>>>>>
>>>>> I wonder if the reset is needed, if the firmware has already initialized
>>>>> the device.
>>>>
>>>> The devices on the bus need to be reset, because the OS has no idea of
>>>> what they are and what the firmware has them doing.
>>>>
>>>> For example, the firmware may have assigned bus address 2 to a
>>>> keyboard.  But the OS can initialize the devices in a different order,
>>>> and it might want to assign bus address 2 to a USB drive.  Then you'd
>>>> have two devices trying to use the same address at the same time, which
>>>> would not be a good thing.
>>>
>>> Understood.
>>>
>>> So, what would be a way forward? Add a whitelist for boards or chipsets
>>> not needing the 50 ms delay?
>>
>> The 50-ms delay isn't for the board or the chipset; it is for the USB
>> devices that are plugged into the controller.  It is required by the
>> USB spec, so we can't get rid of it.
> 
> I may have been too hasty.  The drivers for other types of USB host
> controllers do not perform a USB bus reset during startup, so maybe
> OHCI doesn't really need it either.
> 
> We still need to put the controller into the correct state, but what
> happens to the bus shouldn't matter.  This is because reinitializing
> the controller disables all its ports, and the only way to enable a
> port is by sending a reset signal through it.  So the attached devices
> will end up getting reset one way or another, even if we don't do it
> explicitly during the handoff.
> 
> Therefore in theory we should be okay without the 50-ms delay at all.
> And we might as well tell the controller to go into the USB_RESET even
> if it already is in that state; testing the current state is more
> effort than just doing setting it.  Something like the patch below
> ought to work, although I wouldn't submit it for the -stable kernels
> since it doesn't fix a real bug.
> 
> It's not clear why OHCI has both a USB_RESET state and a
> HostControllerReset command, especially since the command changes the
> state to USB_SUSPEND instead of USB_RESET.  This is just one of several
> odd things in the OHCI specification.

> Index: usb-4.x/drivers/usb/host/pci-quirks.c
> ===================================================================
> --- usb-4.x.orig/drivers/usb/host/pci-quirks.c
> +++ usb-4.x/drivers/usb/host/pci-quirks.c
> @@ -783,15 +783,9 @@ static void quirk_usb_handoff_ohci(struc
>   	/* disable interrupts */
>   	writel((u32) ~0, base + OHCI_INTRDISABLE);
>   
> -	/* Reset the USB bus, if the controller isn't already in RESET */
> -	if (control & OHCI_HCFS) {
> -		/* Go into RESET, preserving RWC (and possibly IR) */
> -		writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
> -		readl(base + OHCI_CONTROL);
> -
> -		/* drive bus reset for at least 50 ms (7.1.7.5) */
> -		msleep(50);
> -	}
> +	/* Go into the USB_RESET state, preserving RWC (and possibly IR) */
> +	writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
> +	readl(base + OHCI_CONTROL);
>   
>   	/* software reset of the controller, preserving HcFmInterval */
>   	if (!no_fminterval)

Tested on ASRock E350M1 with GRUB as bootloader, and a mouse attached to 
the USB port. The mouse works under X.


Kind regards,

Paul
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diff mbox

Patch

Index: usb-4.x/drivers/usb/host/pci-quirks.c
===================================================================
--- usb-4.x.orig/drivers/usb/host/pci-quirks.c
+++ usb-4.x/drivers/usb/host/pci-quirks.c
@@ -783,15 +783,9 @@  static void quirk_usb_handoff_ohci(struc
 	/* disable interrupts */
 	writel((u32) ~0, base + OHCI_INTRDISABLE);
 
-	/* Reset the USB bus, if the controller isn't already in RESET */
-	if (control & OHCI_HCFS) {
-		/* Go into RESET, preserving RWC (and possibly IR) */
-		writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
-		readl(base + OHCI_CONTROL);
-
-		/* drive bus reset for at least 50 ms (7.1.7.5) */
-		msleep(50);
-	}
+	/* Go into the USB_RESET state, preserving RWC (and possibly IR) */
+	writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
+	readl(base + OHCI_CONTROL);
 
 	/* software reset of the controller, preserving HcFmInterval */
 	if (!no_fminterval)