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USB: OHCI: Remove USB bus reset delay from OHCI handover code

Message ID Pine.LNX.4.44L0.1808281056020.1443-100000@iolanthe.rowland.org (mailing list archive)
State New, archived
Headers show
Series USB: OHCI: Remove USB bus reset delay from OHCI handover code | expand

Commit Message

Alan Stern Aug. 28, 2018, 2:57 p.m. UTC 
Paul pointed out that the 50-ms sleep during OHCI initialization takes
up a large fraction of a system's boot time.  Things get worse when
there are two OHCI controllers present, each requiring 50 ms.

However, there really is no need to send a 50-ms reset signal out all
the root-hub ports during initialization.  The ports themselves will
be disabled, and the only way to enable a port is to reset it.
Therefore all attached USB devices will receive a proper reset in any
case.  The controller reset does not need to be long enough to reset
those other devices, so the 50-ms delay isn't necessary.

Without the delay, there is no remaining incentive for skipping the
reset when the controller is already in the RESET state.  This patch
removes the test, issuing the command unconditionally, and removes the
following delay.

Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Suggested-by: Paul Menzel <pmenzel@molgen.mpg.de>
Tested-by: Paul Menzel <pmenzel@molgen.mpg.de>

---


[as1876]


 drivers/usb/host/pci-quirks.c |   12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)
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Patch

Index: usb-4.x/drivers/usb/host/pci-quirks.c
===================================================================
--- usb-4.x.orig/drivers/usb/host/pci-quirks.c
+++ usb-4.x/drivers/usb/host/pci-quirks.c
@@ -783,15 +783,9 @@  static void quirk_usb_handoff_ohci(struc
 	/* disable interrupts */
 	writel((u32) ~0, base + OHCI_INTRDISABLE);
 
-	/* Reset the USB bus, if the controller isn't already in RESET */
-	if (control & OHCI_HCFS) {
-		/* Go into RESET, preserving RWC (and possibly IR) */
-		writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
-		readl(base + OHCI_CONTROL);
-
-		/* drive bus reset for at least 50 ms (7.1.7.5) */
-		msleep(50);
-	}
+	/* Go into the USB_RESET state, preserving RWC (and possibly IR) */
+	writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
+	readl(base + OHCI_CONTROL);
 
 	/* software reset of the controller, preserving HcFmInterval */
 	if (!no_fminterval)