From patchwork Wed May 23 08:53:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Q2h1bmZlbmcgWXVuICjkupHmmKXls7Ap?= X-Patchwork-Id: 10420689 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 762096032A for ; Wed, 23 May 2018 08:53:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6761228DAB for ; Wed, 23 May 2018 08:53:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5BB0D28EC6; Wed, 23 May 2018 08:53:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DF23D28DAB for ; Wed, 23 May 2018 08:53:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754503AbeEWIxd (ORCPT ); Wed, 23 May 2018 04:53:33 -0400 Received: from mailgw02.mediatek.com ([1.203.163.81]:13749 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754488AbeEWIx3 (ORCPT ); Wed, 23 May 2018 04:53:29 -0400 X-UUID: 38db6135bd6645f3997b66eb51802c19-20180523 Received: from mtkcas36.mediatek.inc [(172.27.4.250)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1073132590; Wed, 23 May 2018 16:53:25 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Wed, 23 May 2018 16:53:23 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Wed, 23 May 2018 16:53:22 +0800 From: Chunfeng Yun To: Greg Kroah-Hartman , Felipe Balbi CC: Matthias Brugger , Chunfeng Yun , , , , , Subject: [next, PATCH 2/6] usb: mtu3: fix uncontinuous SeqN issue after disable EP Date: Wed, 23 May 2018 16:53:16 +0800 Message-ID: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1291b13a362eaa0cccd30cb8dd4f56d33e1d172d.1527065109.git.chunfeng.yun@mediatek.com> References: <1291b13a362eaa0cccd30cb8dd4f56d33e1d172d.1527065109.git.chunfeng.yun@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Reset EP when disable it to reset data toggle for U2 EP, and SeqN, flow control status etc for U3 EP, this can avoid issue of uncontinuous SeqN Signed-off-by: Chunfeng Yun --- drivers/usb/mtu3/mtu3_core.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/usb/mtu3/mtu3_core.c b/drivers/usb/mtu3/mtu3_core.c index 65ff53a..279f9cd 100644 --- a/drivers/usb/mtu3/mtu3_core.c +++ b/drivers/usb/mtu3/mtu3_core.c @@ -195,6 +195,16 @@ static void mtu3_intr_enable(struct mtu3 *mtu) mtu3_writel(mbase, U3D_DEV_LINK_INTR_ENABLE, SSUSB_DEV_SPEED_CHG_INTR); } +/* reset: u2 - data toggle, u3 - SeqN, flow control status etc */ +static void mtu3_ep_reset(struct mtu3_ep *mep) +{ + struct mtu3 *mtu = mep->mtu; + u32 rst_bit = EP_RST(mep->is_in, mep->epnum); + + mtu3_setbits(mtu->mac_base, U3D_EP_RST, rst_bit); + mtu3_clrbits(mtu->mac_base, U3D_EP_RST, rst_bit); +} + /* set/clear the stall and toggle bits for non-ep0 */ void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set) { @@ -220,8 +230,7 @@ void mtu3_ep_stall_set(struct mtu3_ep *mep, bool set) } if (!set) { - mtu3_setbits(mbase, U3D_EP_RST, EP_RST(mep->is_in, epnum)); - mtu3_clrbits(mbase, U3D_EP_RST, EP_RST(mep->is_in, epnum)); + mtu3_ep_reset(mep); mep->flags &= ~MTU3_EP_STALL; } else { mep->flags |= MTU3_EP_STALL; @@ -400,6 +409,7 @@ void mtu3_deconfig_ep(struct mtu3 *mtu, struct mtu3_ep *mep) mtu3_setbits(mbase, U3D_QIECR0, QMU_RX_DONE_INT(epnum)); } + mtu3_ep_reset(mep); ep_fifo_free(mep); dev_dbg(mtu->dev, "%s: %s\n", __func__, mep->name);