@@ -1267,6 +1267,8 @@ static void dwc3_get_properties(struct dwc3 *dwc)
hird_threshold = 12;
dwc->maximum_speed = usb_get_maximum_speed(dev);
+ dwc->maximum_phy_gen = usb_get_ssp_phy_gen(dev);
+ dwc->maximum_num_lanes = usb_get_ssp_num_lanes(dev);
dwc->dr_mode = usb_get_dr_mode(dev);
dwc->hsphy_mode = of_usb_get_phy_mode(dev->of_node);
@@ -1435,6 +1437,33 @@ static void dwc3_check_params(struct dwc3 *dwc)
}
break;
}
+
+ /*
+ * Currently the controller does not have visibility into the HW
+ * parameter to determine the maximum number of lanes the HW
+ * supports. If the number of lanes is not specified in the
+ * device property, then set the default to 2 for DWC_usb32 and
+ * 1 for DWC_usb31 for super-speed-plus.
+ */
+ if (dwc->maximum_speed == USB_SPEED_SUPER_PLUS) {
+ if (DWC3_IP_IS(DWC32)) {
+ if (dwc->maximum_phy_gen == USB_PHY_GEN_UNKNOWN)
+ dwc->maximum_phy_gen = USB_PHY_GEN_2;
+
+ if (!dwc->maximum_num_lanes)
+ dwc->maximum_num_lanes = 2;
+
+ } else if (DWC3_IP_IS(DWC31)) {
+ if (dwc->maximum_num_lanes > 1)
+ dev_warn(dev, "UDC doesn't support multi-lanes\n");
+
+ dwc->maximum_phy_gen = USB_PHY_GEN_2;
+ dwc->maximum_num_lanes = 1;
+ }
+ } else {
+ dwc->maximum_phy_gen = USB_PHY_GEN_UNKNOWN;
+ dwc->maximum_num_lanes = 0;
+ }
}
static int dwc3_probe(struct platform_device *pdev)
@@ -959,6 +959,8 @@ struct dwc3_scratchpad_array {
* @nr_scratch: number of scratch buffers
* @u1u2: only used on revisions <1.83a for workaround
* @maximum_speed: maximum speed requested (mainly for testing purposes)
+ * @maximum_phy_gen: maximum phy signaling rate
+ * @maximum_num_lanes: maximum number of lanes
* @ip: controller's ID
* @revision: controller's version of an IP
* @version_type: VERSIONTYPE register contents, a sub release of a revision
@@ -989,6 +991,7 @@ struct dwc3_scratchpad_array {
* @ep0state: state of endpoint zero
* @link_state: link state
* @speed: device speed (super, high, full, low)
+ * @num_lanes: number of connected lanes
* @hwparams: copy of hwparams registers
* @root: debugfs root folder pointer
* @regset: debugfs pointer to regdump file
@@ -1120,6 +1123,8 @@ struct dwc3 {
u32 nr_scratch;
u32 u1u2;
u32 maximum_speed;
+ enum usb_phy_gen maximum_phy_gen;
+ u8 maximum_num_lanes;
u32 ip;
@@ -1185,6 +1190,7 @@ struct dwc3 {
u8 u1pel;
u8 speed;
+ u8 num_lanes;
u8 num_eps;
DWC_usb32 supports dual-lane operating at different sublink speeds. Initialize and validate the maximum number of lanes and speed the controller supports in the maximum_speed property. Currently the controller has no visibility into the HW parameter to determine the maximum number of lanes the HW supports. If the number of lanes is not specified, then set the default to 2 for DWC_usb32 and 1 for DWC_usb31 for SSP. Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> --- Changes in v5: - Rebase on Felipe's testing/next branch - Changed Signed-off-by email to match From: email header Changes in v4: - Use new common funtions to get SSP Gen and number of lanes Changes in v3: - Use new common function to get maximum-speed - Remove num_lanes and lsm validation since they are no longer separate properties - Replace dwc->maxmum_lsm field with dwc->maximum_ssp_rate for gen1/gen2 Changes in v2: - Use common functions to get num_lanes and lsm properties drivers/usb/dwc3/core.c | 29 +++++++++++++++++++++++++++++ drivers/usb/dwc3/core.h | 6 ++++++ 2 files changed, 35 insertions(+)